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Simulating Gate-All-Around (GAA) Devices at the Atomic LevelTransistor fabrication has spanned the gamut from planar…Read More
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As a kid I was interested in electronics and early personal computers. I went on to graduate from Manchester University in 1986, the birthplace of the modern computer, studying Computer Engineering where for my final year project I designed a gate array using Ferranti Electronics technology… Read More
ASML hits great numbers
ASML reported revenues of Euro 4B, with income of Euro 2.54EPS, both beating estimates handily. Ten EUV systems were … Read More
In the early days of Atrenta I met with Ralph Marlett, a distinguished test expert with many years of experience at Zuken and Recal Redac. He talked me into believing we could do meaningful static analysis for DFT-friendliness at RTL. His work with us really opened my eyes to the challenges that test groups face in integrating their… Read More
In a recent post, I discussed how NetApp provides comprehensive support for moving your EDA flow to the cloud. In that post, I explored the tools, technologies and services that help design organizations move to the cloud in a coherent, predictable, and incremental manner. Having a smooth-running hybrid/on-premise or… Read More
It simply makes no sense to call for IoT devices to be certified safe-and-secure. Before you get bent out of shape, hear me out.
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Virtual conferences are getting better all the time. Easy-to-navigate agendas, good production value in terms of visual presentation, professionally produced video segments and interspersed live events all contribute to the experience. Arm held their developers’ summit in the US on October 6-8, and it had all the attributes… Read More
Though hopefully not some of us all of the time. Randomization is a technique used in verification to improve coverage in testing. You develop tests you know you have to run, then you throw randomization on top of that to search around those starter tests, to explore possibilities you haven’t considered. Truly random tests are not… Read More
In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More
I am pleased to introduce Truechip to the SemiWiki community. Truechip is a leader in the IP Verification – Design and Verification solutions market, one of the fastest growing market segments we track. Truechip has been serving customers for more than 10 years specialization in VIP integration, customization and SOC Verification.… Read More
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