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Optimizing for Thermoelastic in Package and PCB Design from the Outset

Optimizing for Thermoelastic in Package and PCB Design from the Outset
by Bernard Murphy on 08-25-2026 at 6:00 am

Vinci image

Signoff-quality design tools are mandatory for signoff, though not so good for early design exploration. Signoff demands high accuracy in design description and high precision in analysis. The first requirement can’t be met early in design where architecture decisions are still in flux, and the second depends on very detailed… Read More


Avestra: Agentic AI for SystemVerilog Assertion Generation

Avestra: Agentic AI for SystemVerilog Assertion Generation
by Daniel Nenni on 08-24-2026 at 2:00 pm

Avestra Studio Tuple Tech

Modern ASIC, SoC, CPU, and GPU development depends on verification processes that detect subtle functional defects before tapeout. SystemVerilog Assertions (SVA) are particularly important because they encode temporal design intent: how signals, states, and transactions must behave across clock cycles. Unlike conventional… Read More


RISC-V at Sixteen: From Modular ISA to Standardized Platforms at Hot Chips 2026

RISC-V at Sixteen: From Modular ISA to Standardized Platforms at Hot Chips 2026
by Admin on 08-24-2026 at 12:00 pm

RISC V at 16 Hot Chips

RISC-V has evolved from a Berkeley research architecture into a global instruction-set standard spanning embedded controllers, application processors, accelerators, and emerging servers. Its defining technical characteristic is not merely openness, but disciplined modularity. Four ratified base ISAs—RV32I, RV64I,… Read More


Hot Chips: Evolving Memory Architectures for Artificial Intelligence

Hot Chips: Evolving Memory Architectures for Artificial Intelligence
by Admin on 08-24-2026 at 10:00 am

Evolving Memory Architectures for AI Hot CHips 2026

Artificial intelligence performance is increasingly constrained by memory rather than arithmetic throughput. Scaling laws show that model quality improves when parameter count, training data, and compute grow together, but this balance fails when processors cannot obtain operands quickly enough. Contemporary accelerators… Read More


Synopsys Cloud at DAC 2026

Synopsys Cloud at DAC 2026
by Daniel Payne on 08-24-2026 at 8:00 am

Synopsys Cloud FlexEDA

Cloud-based EDA has been around for awhile now, so at #DAC2026 I met with Vikram Bhatia, Executive Director of Synopsys Cloud to see what’s new with their offering. His background includes stints at Sun, IBM, Microsoft, HP, Oracle and NetApp. The Synopsys Cloud FlexEDA lets designs teams run their EDA solutions inside of a web browser,… Read More


The Sky’s the Limit: SiFive’s BigSky Brings RISC-V to the Datacenter

The Sky’s the Limit: SiFive’s BigSky Brings RISC-V to the Datacenter
by Daniel Nenni on 08-24-2026 at 6:00 am

The Sky’s the Limit SiFive’s BigSky Brings RISC V to the Datacenter

SiFive is bringing RISC-V closer to mainstream datacenter deployment with the BigSky SF-2U870, an enterprise-grade development server designed for hyperscalers, semiconductor companies, software vendors, and ecosystem partners. Announced in Santa Clara on August 24, 2026, alongside Hot Chips, the rackable 2U platform… Read More


What Hot Chips 2026 Tells Us About What Silicon Valley Is Actually Building

What Hot Chips 2026 Tells Us About What Silicon Valley Is Actually Building
by Jonah McLeod on 08-23-2026 at 6:00 pm

What Hot Chips Tells us 2026

Here’s what the presentations selected for the 2026 Hot Chips Conference tell us about what Silicon Valley companies are doing these days.

The conference, running this week at Stanford’s Memorial Auditorium, doesn’t publish detailed abstracts ahead of time, but the program itself, just the lineup of who’s presenting what, … Read More


Podcast EP362: An atomic layer in compute. A discussion of what can be built as graphene photonics scales with Cedric Huyghebaert

Podcast EP362: An atomic layer in compute. A discussion of what can be built as graphene photonics scales with Cedric Huyghebaert
by Daniel Nenni on 08-21-2026 at 2:00 pm

Daniel is joined by Dr. Cedric Huyghebaert, CTO of Black Semiconductor. Cedric is one of the world’s leading experts in the development and integration of 2D materials, particularly graphene, into industrial semiconductor manufacturing. With a PhD in Physics from KU Leuven and over 25 years at imec, Cedric built and led… Read More


How TSMC Is Wiring the AI Era With Light

How TSMC Is Wiring the AI Era With Light
by Daniel Nenni on 08-21-2026 at 10:00 am

How TSMC Is Wiring the AI Era With Light

TSMC’s photonics strategy is centered on integrating optical input-output with advanced logic, rather than selling conventional optical transceivers as standalone products. The company is developing a silicon-photonics foundry platform and a packaging architecture called TSMC-COUPE, or Compact Universal Photonic … Read More


Intel Eyes a Memory Comeback as AI Rewrites Chip Economics

Intel Eyes a Memory Comeback as AI Rewrites Chip Economics
by Daniel Nenni on 08-21-2026 at 6:00 am

Intel Eyes Memory Comeback

Intel is considering a return to memory technology decades after abandoning mainstream DRAM and, more recently, selling its NAND business. Chief executive Lip-Bu Tan has argued that memory should no longer be viewed simply as a low-margin commodity. Artificial intelligence is turning bandwidth, latency and data movement … Read More