S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
The Critical Role of Pre-Silicon Security Verification with Secure-IC’s Laboryzr™ PlatformAs embedded systems and System-on-Chip (SoC) designs grow…Read More
-ASML weakness is evidence of deeper chip down cycle
-When ASML sneezes other chip equip makers catch a cold
-Will backlog last long enough? Will EUV demand hold up?
-“Unthinkable” event, litho cancelations, could shock industry
ASML reported Euro6.7B… Read More
Design IP revenues had achieved $6.67B in 2022, after $5.56B in 2021, or 20.2% growth after 19.4% in 2021 and 16.7% in 2020. IPnest has released the “Design IP Report” in April 2023, ranking IP vendors by category (CPU, DSP, GPU & ISP, Wired Interface, SRAM Memory Compiler, Flash Memory Compiler, Library and I/O, AMS, Wireless… Read More
S2C, a leading provider of FPGA-based prototyping solutions, has helped a client achieve high-performance secure GPU chip verification. With the help of S2C’s Prodigy prototyping solution, the client was able to start software development and hardware-software co-design early, leading to accelerated time-to-market… Read More
It was back in 1991 that Cadence first announced the Virtuoso product name, and here we are 32 years later and the product is alive and doing quite well. Steven Lewis from Cadence gave me an update on something new that they call Virtuoso Studio, and it’s all about custom IC design for the real world. In those 32 years we’ve… Read More
Shipments of PCs and smartphones were weak in 2022 and continue to decline in 2023. For the first quarter of 2023, IDC estimated PC shipments dropped 29% from a year earlier. This follows a 28% year-to-year decline in 4Q 2022. For the year 2022, PC shipments declined 16% from 2021, the largest year-to-year decline in the history of… Read More
As digital transmission speeds increase, designers use various techniques to improve the signal-to-noise ratio at the receiver output. One such technique is the Decision Feedback Equalizer (DFE) scheme, commonly used in high-speed Serializer-Deserializer (SerDes) circuits to mitigate the effects of channel noise and … Read More
Normalized image log-slope (NILS) is probably the single most essential metric for describing lithographic image quality. It is defined as the slope of the log of intensity, multiplied by the linewidth [1], NILS = d(log I)/dx * w = w/I dI/dx. Essentially, it gives the % change in width for a given % change in dose. This is particularly… Read More
Dan is joined by Matt Genovese. Matt founded Planorama Design, a user experience design professional services company to design complex, technical software and systems that are simple and intuitive to use while reducing internal development and support costs. Staffed with seasoned engineers and user experience designers,… Read More
Generative AI is all the rage with systems like ChatGPT, Google Bard and DALL-E being introduced with great fanfare in the past year. The EDA industry has also been keen to adopt the trends of using AI techniques to assist IC engineers across many disciplines. Saugat Sen, Product Marketing at Cadence did a video call with me to explain… Read More
Dan is joined by Sudhir Mallya, Senior Vice President of Corporate Marketing at Alphawave Semi. He is based in Silicon Valley and has over 25 years of experience at leading global semiconductor companies with executive positions in engineering, marketing, and business unit management. His experience spans custom silicon and… Read More
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