WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 692
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 692
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
)
            
Synopsys Webinar White 800x100 px Max Quality (1)
WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 692
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 692
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
)

ARC Processor Virtual Summit!

ARC Processor Virtual Summit!
by Daniel Nenni on 08-21-2020 at 6:00 am

The ARC Processor has a rich history. Originally named the Argonaut RISC Processor, it was designed for the Nintendo Game Systems in the 1990s. Argonaut Technologies Limited later became ARC International. My first intimate exposure to ARC was in 2009 when Virage Logic acquired ARC. A year later Virage was acquired by Synopsys and the rest as they say is history.

There was a lot of speculation at the time whether Synopsys would invest in ARC or let it ride off into the IP sunset. Today I can tell you without a doubt that Synopsys has heavily invested in the ARC processor making it a leading configurable processor core for embedded products around the world, absolutely.

Which brings us to the upcoming ARC Processor Virtual Summit. Virtual events are still evolving but in my experience Synopsys does it right so you are not going to want to miss this one.  The topics include: Automotive Security, Safety and Reliability, Artificial Intelligence, Machine Learning, High-Performance, Embedded IoT. Here are some of the presentation abstracts but check out the full agenda to see descriptions of all 18 sessions (they had me at Porsche).

ARC Processor Virtual Summit 2020

Join us for the ARC Processor Virtual Summit to hear our experts, users and ecosystem partners discuss the most recent trends and product developments in ARC-based processor solutions.  This multi-day event will provide you with in-depth information from industry leaders on the latest processor IP solutions.

Whether you are a developer of chips, systems or software, the ARC Processor Virtual Summit will give you practical information to help you create more differentiated products in the shortest amount of time.

Frank McCleary
Associate Partner, Porsche Consulting, Inc.
Accelerating Development of Functionally Safe Automotive Systems
The increasingly complex electronics hardware and software architectures of next-generation autonomous, connected, and electric vehicles represent new and daunting challenges for automotive engineering teams. This keynote by Porsche Consulting, Inc. will discuss how automotive development organizations can accelerate silicon chip design with automotive-grade IP, speed software development with virtual prototypes, and address functionality safety and reliability throughout the development lifecycle.

Jeff Bier
Founder, Edge AI & Vision Alliance / President, BDTI
Key Trends in the Deployment of Edge AI and Computer Vision
With edge AI and computer vision technologies advancing rapidly, it can be difficult to see the big picture. This keynote will describe the four most important edge AI and vision trends that are influencing the future of the industry: deep learning; streamlining edge development; fast, cheap, energy-efficient processors; and new sensors. Bier will highlight key implications for technology suppliers, solution developers and end-users. In addition, he will illustrate each of these trends with technology and application examples.

A Single SoC Architecture for Managing the Varying Performance Requirements of Multiple Automotive Applications
Presenter: Konrad Walluszik, Concept Engineer, Infineon
A key trend in the automotive industry is to develop safer, smarter and more eco-friendly cars. Accomplishing this requires innovative semiconductor products that can address a variety of automotive use cases such as domain controllers, e-mobility and advanced driver assistance systems (ADAS).

This presentation describes the challenges of addressing varying performance workloads with a homogenous SoC family targeting different automotive application domains. Leveraging the capabilities of a highly-configurable ARC Vector DSP solution allows scalable SIMD performance, supplemented by a uniform ecosystem to address the family concept. Based on application examples the presentation will show how corresponding challenges are solved by optimized ARC processors.

Safe & Secure SoC Architectures for Autonomous Vehicles
Presenter: Fergus Casey, R&D Director, Synopsys
Let’s face it: People are bad drivers. The Driver is the biggest uncertainty factor in cars, and computer vision is helping to eliminate human error and make the roads safer. Autonomous vehicles are expected to save almost 300K lives each decade in the United States, but after 4-5 decades of autonomous car proof of concepts and years of development, driverless cares still seem a long way off. This presentation will describe the challenges that SoC designers and OEMs face when developing self-driving vehicles, from understanding how a pedestrian looks to software/silicon, to understanding an entire scene. It will then describe the key milestones that the industry, and each chip design, must reach on the road to autonomous driving, and how to know when you’ve reached them.

How to Execute AUTOSAR Classic Projects from a Tooling Perspective on the ARC Functional Safety Processor IP
Presenter: Chris Thibeault, Head of Partner Management – Americas, Elektrobit
Electronic control units (ECUs) empower vehicle functionality, and tooling is an essential aspect of AUTomotive Open System ARchitecture (AUTOSAR) Classic for ECU development.  In this presentation, attendees will learn how the AUTOSAR Standard has evolved. In addition, best practices to set up a typical configuration and integration workflow, including tooling aspects of the AUTOSAR methodology using Elektrobit’s solution for AUTOSAR Classic, as well as configuring AUTOSAR basic software modules and translating the code running on Synopsys’ Functional Safety Processor IP will be covered.

SoC Level Safety Management, A Software View
Speaker: Anatoly Savchenkov, Software Engineering Manager, Synopsys
Increasing complexity of automotive ICs consisting of multiple heterogeneous processors and accelerators, I/O interfaces and custom hardware blocks raises unprecedented challenges for safety architects. Safety management tasks including safe boot, periodic safety testing and handling of runtime safety escalations traditionally are done in hardware making them expensive and not easily reusable in multiple designs. This presentation describes how Synopsys safety hardware architectures are enabled by ARC embedded safety software to deliver increased usability, extensibility, and robustness for SoC level safety management tasks.

Implement ASIL D-Compliant ARC Processor IP Using Synopsys’ Native Automotive Design Solution
Speaker: Shiv Chonnad, Sr. Quality Engineer, Synopsys
Next-generation autonomous driving and advanced driver-assistance systems (ADAS) applications require complex safety-critical electronic components. The SoC designs used in these electronics should adhere to the ISO 26262 functional safety (FuSa) standard to achieve the highest automotive safety integrity level (ASIL). Synopsys offers the broadest portfolio of silicon-proven automotive-grade IP, which is ISO 26262 certified up to ASIL D, for use when developing safety-critical SoCs. Synopsys’ new native automotive RTL-to-GDSII solution, driven by FuSa intent, enables designers to efficiently implement and verify FuSa mechanisms in order to achieve target ASIL with improved quality-of-results and ease-of-use. The Solutions Group IP team has successfully leveraged the native automotive RTL-to-GDSII solution. This presentation will describe the ASIL D-compliant ARC processor IP and the new native RTL-to-GDSII solution, the resulting implementation flow with an ARC HS46 dual-core lock-step (DCLS) processor, and benefits for the SoC designer.

Addressing the Challenges of RADAR, LiDAR & Vision Sensor Fusion for Next-Generation Automotive ADAS Systems
Speaker: Pieter van der Wolf, Principal R&D Engineer, Synopsys
Automotive ADAS systems use multiple sensing technologies, RADAR, LiDAR and Imaging to create a 360 degree view of surroundings. Each different sensing technology has its own advantages to environmental conditions. Complexity is increasing in ADAS systems, while demanding a reduction in component cost. This presentation will go through the computation capabilities of various Synopsys ARC processors as well as discuss the use of cross computation and sensor fusion functionality to improve the quality of sensor detected object data in automotive ADAS systems.

REGISTER HERE AND JOIN US FOR THE ARC PROCESSOR VIRTUAL SUMMIT

Also Read:

Synopsys Webinar: A Comprehensive Overview of High-Speed Data Center Communications

Accelerating High-Performance Computing SoC Designs with Synopsys IP

Quantifying the Benefits of AI in Edge Computing

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.