On Sep 20th, Synopsys announced an expansion of its DesignWare® ARC® Processor IP portfolio with new 128-bit ARC VPX2 and 256-bit ARC VPX3 DSP Processors targeting low-power embedded SoCs. In 2019, the company had launched a 512-bit ARC VPX5 DSP processor for high-performance signal processing SoCs. Due to the length, format… Read More
Ansys 2023 R1: Radar Clutter Modeling with STK What’s New
Learn about STK Radar Clutter geometries and scattering models through the Radar plugin interface and how to analyze the impacts of clutter on a radar’s overall system performance and ability to maintain tracking of target objects.
TIME:
MARCH 29, 2023
11 AM EST / 4 PM GMT / 9:30 PM IST
About this Webinar
- Learn about the open and flexible