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System Design: Turtles All the Way Down

System Design: Turtles All the Way Down
by Paul McLellan on 04-27-2014 at 7:34 am

 According to Steven Hawking, Bertrand Russell once gave a public lecture on astronomy. He described how the earth orbits around the sun and how the sun orbits around our galaxy. At the end of the lecture, a little old lady at the back of the room got up and said: “What you have told us is rubbish. The world is really a flat plate supported on the back of a giant turtle.” The scientist gave a superior smile before replying, “What is the turtle standing on?” “You’re very clever, young man,” said the old lady. “But it’s turtles all the way down!”

Electronic systems are a bit like that. What is a system depends on who you talk to, and a system to one person is built out of components that are themselves systems to someone else. Pierre Paulin neatly defined system-level as “one level above whatever level you are working at.”

In the EDA and semiconductor world, we are used to talking about systems-on-chip or SoCs. But the reality is that almost no consumer product consists only of a chip. The closest are probably those remote sensing transport fare-cards like Clipper. They are self-contained and don’t even need a battery (they are powered by induction).

Most SoCs require power supplies, antennas and a circuit board, plus a human interface of some sort (screen, buttons, microphones, speakers, USB…) to make an end-user product. Nonetheless, a large part of the intelligence and complexity of a consumer product is distilled into the primary SoC inside so it is not a misnomer to refer call them systems. There is a reason Apple builds its Ax chips but not the other chips in the iPhone and iPad.

However, when we talk about system level in the context of chip design, we need to be humble and realize that the chip goes into something larger that some other person considers to be the system. Importantly from a business perspective, is that the people at the higher level have very little interest in how the lower-level components are designed and how it is technically hard to take advantage of in any case. The RTL designer doesn’t care much about how the library was characterized; the software engineer doesn’t care much about how the language used for the RTL and so on.

At each level, some model of the system is required. It seems to be a rule of modeling that it is very difficult to improve (automatically) the performance of a model by much more than a factor of 10 or 20 by throwing out detail. Obviously, you can’t do software development on an RTL model of the microprocessor, too slow by far. Less obviously, you can’t create a model on which you can develop software simply by taking the RTL model and reducing its detail and speeding it up. At the next level down, the RTL model itself is not something that can be created simply by crunching the gate-level netlist, which in turn is very different from the SPICE netlist.

When I was at Virtutech, Ericsson was a customer and they used (and maybe still do) Virtutech’s products to model 3G base stations, which is what the engineers we interfaced with considered a system. A 3G base station is a cabinet-sized box that can contain anything from a dozen up to 60 or so large circuit boards, in total perhaps 800 processors all running their own code. Each base station is actually a unique configuration of boards so each had to be modeled to make sure that that collection of boards operated correctly, which was easiest to do with simulation. Finding all the right boards and cables would take at least a couple of weeks.

And most chips are built using an IP-based methodology, some of which is complex enough to call a system in its own right. So it’s pretty much “turtles all the way down”.

More articles by Paul McLellan…

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