Stratus HLS (High Level Synthesis) Seminar Series: [Part 5] Verification of high-level synthesis RTL and Stratus integration flow

Online

Date and time: Friday, November 10, 2023 15:00-16:00 Sponsor: Japan Cadence Design Systems, Innotek Co., Ltd. IC Solution Headquarters Cost: Free Venue: Online (Zoom webinar) *You can also participate from a web browser. We recommend using Google Chrome, Firefox, or Chromium Edge. Registration deadline: November 9th (Thursday) 16:00 In recent years, as LSI designs become …