Webinar: From MATLAB to Optimized RTL in Minutes

Online

Date: Thursday, September 22, 2022 Time: 12:00pm - 1:00pm (PDT) As semiconductor process technology advances, predicting and achieving design power, performance, and area (PPA) goals become increasingly difficult. Developing high-performance algorithms for AI and signal processing is particularly challenging as algorithm development is abstracted from design implementation, often resulting in late discovery of performance issues. …

CadenceCONNECT Custom IC Day: Eindhoven and Zurich

Eindhoven and Zurich

Gear Up for Design Excellence with Cadence Virtuoso Applying the full power of Cadence’s leading technology platform for rapid, robust custom IC design The Cadence Virtuoso® and Spectre® platforms are the foundation of custom and mixed-signal IC design. Through integrated flows, the broadest foundry support, and compelling algorithms, Cadence amplifies the creativity of designers. Cadence has …

CadenceCONNECT Custom IC Day: Cork, Ireland

Cork, Ireland Cork, Ireland

Gear Up for Design Excellence with Cadence Virtuoso Applying the full power of Cadence’s leading technology platform for rapid, robust custom IC design The Cadence Virtuoso® and Spectre® platforms are the foundation of custom and mixed-signal IC design. Through integrated flows, the broadest foundry support, and compelling algorithms, Cadence amplifies the creativity of designers. Cadence has …

CadenceCONNECT Custom IC Day: Leuven, Belgium

Leuven, Belgium Leuven, Belgium

Gear Up for Design Excellence with Cadence Virtuoso Applying the full power of Cadence’s leading technology platform for rapid, robust custom IC design The Cadence Virtuoso® and Spectre® platforms are the foundation of custom and mixed-signal IC design. Through integrated flows, the broadest foundry support, and compelling algorithms, Cadence amplifies the creativity of designers. Cadence has …

CadenceTECHTALK: Find more Bugs, Hit the Most Difficult Scenarios Faster

Online

Date: Thursday, September 29, 2022 Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel Crack the Verification Double Trouble! Chips are becoming bigger and more complex, adding to already existing verification woes. Design and verification engineers struggle with running billions of regression cycles to achieve the desired target coverage and finding as many …

CadenceCONNECT Custom IC Day: Grenoble, Graz, Bracknell

Grenoble, Graz, Bracknell

Gear Up for Design Excellence with Cadence Virtuoso Applying the full power of Cadence’s leading technology platform for rapid, robust custom IC design The Cadence Virtuoso® and Spectre® platforms are the foundation of custom and mixed-signal IC design. Through integrated flows, the broadest foundry support, and compelling algorithms, Cadence amplifies the creativity of designers. Cadence has …

CadenceCONNECT Custom IC Day: Milan, Edinburgh

Milan and Edinburgh

Gear Up for Design Excellence with Cadence Virtuoso Applying the full power of Cadence’s leading technology platform for rapid, robust custom IC design The Cadence Virtuoso® and Spectre® platforms are the foundation of custom and mixed-signal IC design. Through integrated flows, the broadest foundry support, and compelling algorithms, Cadence amplifies the creativity of designers. Cadence has …

CadenceTECHTALK: Driving Low-Power Design with High-Level Synthesis

Online

Date: Wednesday, October 12, 2022 Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel With the growth in computing at the edge driven by the explosion in the number of battery-powered smart devices, designing for low power is mission-critical to product success. Numerous techniques, spanning all stages of design, are employed to reduce …

Webinar: Cadence Further Streamlines MMIC, RFIC, and RF SiP Design Workflows

Online

Date: Tuesday, October 18, 2022 North America Session: 9:00am - 10:00am PT EMEAI Session: 11:00am - 12:00pm CET Demand for next-generation wireless communication, aerospace, and transportation systems is driving the need for high-performance, cost-sensitive silicon RFICs and III-V compound semiconductor monolithic microwave integrated circuits (MMICs), often integrated into advanced system-in-package (SiP) modules. The latest release of the Cadence® AWR …

Cadence TECHTALK: Low-Power Verification using Xcelium Simulation

Online

Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel / 13:30 IST The Cadence low-power solution considers power at every step of the design flow, from architecture to functional verification, analysis, implementation, and signoff. In this webinar, the focus will be on the functional verification of the RTL with the power intent defined …

Cadence TECHTALK: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Online

Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium™ is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator. We keep developing new performance optimizations that are delivered with each new release of Xcelium. It is easy to achieve …

CadenceTECHTALK: Protium Enterprise Prototyping: Higher Productivity, Lower Costs

Online

Prototyping has become essential for chip and IP developers as they deal with exponentially greater testing requirements that come with growing design size, software content, and input data and workloads to run. The increasing complexity in prototyping has naturally increased costs, both in hardware, tools, and engineering talent.  For many projects, build-your-own prototypes are no …