Overview Creating a final design is a sequence of operations from register-transfer-level (RTL) synthesis, through implementation to signoff. Each of these operations is further split into different steps, such as placement, clock tree synthesis, and routing. When run as part of a typical design flow, these steps generate a vast quantity of valuable data, which …
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LIVE WEBINAR | 25 AUGUST 2021 | 11:00 AM EDT Getting the most out of your simulation analysis results Each time an FE model is solved, it can help create a …
Continue reading "Best Practices for Reviewing Finite Element Analysis (FEA)"
Live Webinar – March 31, 1:00 pm EDT Altair SimSolid is a technological breakthrough enabling civil and structural engineers to analyze fully featured CAD assemblies in minutes, eliminating the time-consuming …
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Overview 3D finite element method (FEM) and 3D planar method of moments (MoM) have become a standard design practice for ensuring the accuracy of the overall network simulation. However, without …
Continue reading "In-Design EM Analysis for Microwave/RF Design and Verification Workflows"
Abstract: Designing FPGAs that use a single clock domain is a luxury that very few of us have. Modern FPGA designs must cope with multiple clocks running at different frequencies, …
Continue reading "LIVE WEBINAR: Running CDC Analysis with Xilinx Parameterized Macros (US)"
Meeting date: May 31, 2022 Meeting time: 14:00 - 15:00 (Beijing time) Rigid-flex PCBs are used in many modern electronic devices (such as mobile phones, laptops, and wearables, etc.) due to their form factor, light weight, and cost-effectiveness. Due to the complexity of 3D designs, electromagnetic (EM) analysis of rigid-flex PCBs has been a challenging task …
As boards become smaller and faster, the environment for thermal issues becomes increasingly challenging. The thermal management of significant resistive losses in PCB and package structures is critical, especially because these resistive losses are also temperature-dependent, making dynamic and static IR drop analysis crucial in addressing the performance and capacity challenges of such designs. …
Synopsys Webinar | Thursday, June 23, 2022 | 10:00 - 11:00 a.m. Pacific Today’s million gates integrated circuits (ICs) involve various intellectual properties (IPs) interfacing with each other through multiple asynchronous clock and reset domains. Ensuring all clocks propagate concurrently across each clock tree components used as clock switching elements or each sequential or combinatorial …
Continue reading "Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis"
The SEVENTH installment of the Ansys HFSS Foundation webinar series is here! In this webinar, you will gain a deeper understanding of the mathematical underpinnings of Redhawk-SC and its application in Power analysis and Power integrity. July 7, 2022 11 AM EDT / 4 PM BST / 8:30 PM IST Venue: Online About this Webinar …
Continue reading "Foundations of Semiconductor Power Integrity Analysis and Simulation"
Time: July 7, 2022 11 AM EDT / 4 PM BST / 8:30 PM IST Venue: Virtual About this Event Safety is a crucial property for many products, especially in the aerospace and defense industry, essential to obtaining the necessary certification. To identify appropriate safety requirements early in the development process and to be able …
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Time: 9:00am - 10:00am (PT) Join us for this one-hour CadenceTECHTALK to learn how the Cadence Celsius Thermal Solver uses design data such as layout geometries, material properties, and dissipated power simulation results from Microwave Office software to provide designers with thermal heat map visualization and operating temperature information. Thermal analysis provides RF circuit designers …
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This webinar showcases Ansys medini's many enhancements delivered in Ansys 2022 R2 and shows how you can integrate these features to advance your safety-related activities substantially. TIME: SEPTEMBER 7, 2022 …
Continue reading "Ansys 2022 R2: What’s New in Safety and Cybersecurity Analysis"
