FPGA/ASIC/SOC design
High-Speed SerDes PHY IP for Up to 800G Hyperscale Data Centers
If you are designing high-performance computing and networking SoCs for hyperscale data centers, then you require IP that enables large amounts of data to travel at very fast rates. Whether …
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Powering the Next-Generation Machine Learning Solution with Graph Analytics on Connected Data with Xilinx and TigerGraph
Please join Xilinx and TigerGraph to learn about the next-generation machine learning solution combining cutting edge hardware with graph analytics on connected data to answer these key questions: How do …
7 Tips in 17 Minutes: Previewing the All-New Ansys Discovery
The all-new Ansys Discovery provides engineers with a user-friendly, fast and powerful 3D simulation tool that helps enable the conceptualization, evaluation and refinement of next generation products. Attend this webinar …
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2020 CASPA Tech Education Day
2020 CASPA Tech Education Day HiFive from SiFive: Project Show Case Venue: Zoom Video Webinar Date: Saturday, Aug.15, 2020 Time: 4:00pm – 6:00pm PDT Registration Link: https://www.eventbrite.com/e/2020-caspa-and-sifive-special-education-day-event-tickets-113575328866 Special announcement: 1. Please join our …
AI SoC Case Study: Emerging Neural Networks Drive IP Innovation
The demand for neural network processing is requiring SoC hardware innovation across all market segments. These demands bring a new set of IP requirements unique to different segments, including new …
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Riscure Hybrid Workshop 2020 – Embedded Security via Webcasting & Offline
Welcome to the two (2) day, 13th Annual Hybrid Riscure workshop on September 3 & 4th 2020. The event is will focus on topics relevant to embedded security. The delivery …
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How FPGAs Enable Industrial Automation and Transformation to Industry 4.0
As Industry 4.0 becomes more pervasive, and factories transform to become Smart and Connected, new architectures emerge, paving the way for new industrial applications. Field devices are embedding intelligence and …
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Free webinar – Image sensor testing and packaging
Is an image sensor your next development project? Invest 45 minutes in company of The capabilities of Center of Applied Photonics and Presto Engineering and hear how we can test …
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Chips Alliance Workshop
The CHIPS Alliance is an organization which develops and hosts high quality, open source hardware code (IP cores), interconnect IP (phy and logical protocols), and open source software development tools …
The Edge Event 2020
The Edge Event will gather 1000+ enterprises, telcos, data centre operators, cloud service providers, analysts and array of edge and IoT solution providers all looking to claim their place at the edge. We have …
DVCON Europe 2020
Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.