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AI SoC Case Study: Emerging Neural Networks Drive IP Innovation

September 1 @ 10:00 AM - 11:00 AM

ron lowman
The demand for neural network processing is requiring SoC hardware innovation across all market segments. These demands bring a new set of IP requirements unique to different segments, including new processors, higher bandwidth memories, high speed interconnect, and optimized architectural configurations. Constantly evolving next-generation neural networks place unique additional demands over and above the standard PPA needs of traditional chipset hardware. This presentation will describe how leading AI SoC customers are supporting emerging requirements for fast-changing neural networks. Attendees will learn about successful implementations of how IP, IP tools, and design services can enable more competitive, higher performance SoC designs while minimizing time-to-market.

Ron Lowman
Ron Lowman
AI Strategic Marketing Manager for the Solutions Group
Synopsys

Ron Lowman joined Synopsys in 2014 and is currently the AI Strategic Marketing Manager for the Solutions Group. Ron is responsible for driving Synopsys’ Artificial Intelligence market IP initiatives, including strategic business and market trend analysis. Prior to joining Synopsys, Lowman spent 16 years at Motorola/Freescale in Controls Engineering, Automotive Product & Test Engineering, Product Management, Business Development, Operations, and Strategy Roles. Ron holds a Bachelor of Science in Electrical Engineering from Colorado School of Mines and an MBA from the University of Texas in Austin.

 

Pat Harmon
Pat Harmon
Director of Engineering for Design Consulting
Synopsys

Pat Harmon brings more than two decades of experience to his role as Director of Engineering for Design Consulting at Synopsys. Pat’s primary role is providing consulting services in helping Synopsys customers architect, design, verify, and prototype their SoC for hardware and software validation. These consulting services include helping select, configure, and integrate the appropriate Synopsys IP including, ARC/ASIP processors, interface (PCIe, DDR, MIPI, Eth, …) along with the appropriate 3rd Party IP to complete the SoC solution. Prior to Synopsys, Pat was responsible for all SoC and FPGA design at Lockheed Martin Electronic and Missile Systems, including roadmaps, project planning, consultations, and design implementation. Pat received his Bachelor’s Degree in Electronics Engineering from the Ohio Institute of Technology.

Details

Date:
September 1
Time:
10:00 AM - 11:00 AM
Event Category:
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