Webinar Overview AI technology has enabled electronic devices with the ability to not only see, but also understand the world around it. It enables a wide range of applications such as; self driving cars, automated delivery robots drones, smart cities, augmented reality, intelligent home assistants, and much more. All of these require purpose-built SoCs to …
Cadence Virtuoso is by far the most popular layout tool for IC design. This is especially true at advanced process nodes. One of the key reasons for this is its …
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"This period of pandemic and confinement has fostered telework and remote relationships. As a result, data transfers around the world have increased dramatically. During its annual Devices Workshop, CEA-Leti will share its vision on the management of data in all its forms, from capture to safe restitution. Join CEA-Leti in virtual mode for a remote discussion …
Theme: Cut Costs, Save Time, Reduce Risk Description: Choose sessions from experts around the globe — who will share their insights on how to improve the plan, create, and verify phases of embedded development. Visit our event page to see all the sessions and register! Join your embedded community on the 4th of February for Embedded DevOps Summit, the …
Profiling software on remote systems can be difficult. Discover how the Intel® VTune™ Profiler Server can simplify profiling of HPC clusters over low-bandwidth connections, making it easier to collect, analyze and share performance data. Read More Profiling software on remote systems, especially transient and cloud systems, can be difficult. Installation of drivers and collectors, low-bandwidth …
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About ISSCC The International Solid-State Circuits Conference is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip. The Conference offers a unique opportunity for engineers working at the cutting edge of IC design and application to maintain technical currency, and to network with leading experts… What's New ISSCC 2021 is Going …
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If you want to improve your MPI application performance, this webinar is for you. Find out how a cross-architecture, multi-fabric, message-passing library can help your apps perform better on HPC clusters. Read More Message Passing Interface (MPI) is a powerful library standard that allows for the parallel execution of applications across multiple processors on a …
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February 23-February 25, 2021 Join the CEVA team to experience the smart sensing and wireless connectivity technologies that will shape our future. Visit us for a connected, interactive, and fully immersive experience in our Executive Meeting Room N5.EMRD01, Located Near Entrance #3 (North-East) where we will feature our complete IP solutions portfolio. Home - MWC Shanghai …
Produce Secure, High-quality Code Discover how you can easily produce secure, high-quality code with Klocwork. Klocwork is a static code analysis tool. It checks your code against coding rules. You can filter results, so you can find and fix the most critical errors first. What’s more, using Klocwork ensures secure, compliant, and reliable code. See …
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System-in-package (SiP) designs for high-performance computing (HPC), high-speed networking, and AI applications are extremely complex. To achieve maximum performance without exceeding tight thermal and power constraints, these chips must be designed within the context of the package and the overall system. Ansys 2.5D/3D-IC multiphysics simulations for prototyping and signoff offer a complete methodology for analyzing …
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Traditional FPGA programming models and hardware description languages are not intuitive to many software developers. And even if they are, using them for iterative algorithm development is time consuming. This webinar demonstrates how to streamline the process. Read More If you develop for field-programmable gate arrays (FPGAs), you’re likely familiar with the hours-long experience of …
Join us: BLT is co-organizing this free, live online training event with Xilinx Customer Training and other Xilinx Authorized Training Providers. The two day event includes live instruction, optional labs, and a drawing for a grand prize. Course: Designing with the Versal ACAP: Architecture & Methodology In this virtual, special event, you will be introduced …
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Overview: Join this webinar to learn how Visual Design Diff helps analog/mixed-signal designers using the Cadence Virtuoso platform to manage ECO’s & conduct design reviews more efficiently. VDD gives design and layout engineers the power to quickly compare two versions of a schematic or layout by graphically highlighting the differences directly in the design editor. …
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