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Webinar: Save on Signoff Effort with In-Design DRC and Fill

March 19 @ 10:00 AM - 11:00 AM

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Webinar Series: What’s New About Virtuoso Layout Suite

How can you get the most out of your Virtuoso layout tools? How much do you know about the new layout features in Virtuoso Studio? Join our four-part webinar series and learn how Cadence has reinvented the industry-leading Virtuoso Layout Suite, supporting heterogeneous integration, accelerating tool performance, providing advanced automation, and offering updated productivity features for faster, higher quality integrated circuit (IC) design convergence.

Save on Signoff Effort with In-Design DRC and Fill

Virtuoso Layout Suite has pioneered in-design DRC checking and fixing in the layout editor. However, many of you have realized that the lack of completeness of rules in the techfile has caused many violations to fall through the cracks and are discovered later during signoff. An in-design DRC checking with signoff rule decks often comes at a cost – time and money. Not anymore. With iPegasus Verification System for Virtuoso Studio, you can get signoff-quality physical verification within the Virtuoso Layout Suite. This webinar will teach you how:

  • you can avoid late surprises during signoff and save your efforts using iPegasus system for Virtuoso Studio
  • the new unified toolbar and settings simplifies your design checks with signoff quality
  • the enhanced Annotation Browser gives you an integrated solution for reviewing and fixing errors
  • flexible run scope helps you in DRC fixing without losing focus

Metal fill is an important step in the layout creation process that has gained significance in recent times. Crucial analog portions of the IP need careful handling with symmetry and non-minimum spacing to ensure that metal fills do not degrade circuit performance. iPegasus fill for Virtuoso Studio elevates the user experience by bringing metal fill using signoff rule decks closer to the layout. Natively integrated into Virtuoso Studio, iPegasus fill provides control, accuracy, and performance benefits over running a standalone loosely tied-up flow.

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Details

Date:
March 19
Time:
10:00 AM - 11:00 AM
Event Tags:
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Website:
https://events.cadence.com/event/56552114-bcc5-4a97-ac98-9043d489b537/regProcessStep1

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Cadence
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