Webinar: Accelerate Layout Creation with Automated Place and Route in Virtuoso Studio

Webinar Series: What’s New About Virtuoso Layout Suite

How can you get the most out of your Virtuoso layout tools? How much do you know about the new layout features in Virtuoso Studio? Join our four-part webinar series and learn how Cadence has reinvented the industry-leading Virtuoso Layout Suite, supporting heterogeneous integration, accelerating tool performance, providing advanced automation, and offering updated productivity features for faster, higher quality integrated circuit (IC) design convergence.

Accelerate Layout Creation with Automated Place and Route in Virtuoso Studio

How can you cut down custom layout implementation from days to minutes? Custom device-level automated place and route (APR) for advanced nodes has very different requirements than mature node chip assembly routing. With our new unified APR flow-based user interface integrating the various automation engines in Virtuoso Studio, device-level layout, standard cells and blocks, chip assembly, and memory can automatically be designed from the same interface using the right tool underneath for the right job.

By including an intuitive spreadsheet-style constraint management interface, pre-routing checkers, and support for custom routing constraints, all layout users will find APR technology easy to use, not just the expert ones. In this webinar, we will showcase the following flows:

• Custom device-level APR for advanced node
• Standard cell APR for custom digital designs leveraging seamless integration of Innovus Implementation System’s GigaPlace placement engine and NanoRoute routing engine
• Chip assembly and specialty routing for mature nodes

Automating the placement and routing of custom and analog designs with thousands of nets lets you finish the layout in minutes!

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