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Synopsys CAD Navigation Users Group: Avalon™ & SysNav™
March 24 @ 7:00 AM - 9:00 AM
Join industry leaders from Intel, Qualcomm, onsemi and Synopsys in the 4th annual, 2nd virtual CAD Navigation (CADNav) User’s Group Meeting as they share the latest innovations, methodologies and experiences using Synopsys CADNav tools, Avalon™ and SysNav™.
You’ll hear about successful deployment of Synopsys CADNAV tools on cutting edge technologies for fault isolation and defect confirmation using advanced Failure Analysis methodologies for faster yield ramp. New trends and best practices will be shared using latest features of Avalon™ and SysNav™.
Avalon™ and SysNav™ Solutions for IC and Package FA
Synopsys’ CAD Navigation (CADNav) solutions, Avalon™ and SysNav™, play a critical role in semiconductor die and package Failure Analysis (FA) reducing the overall time to localize IC and Package failures, confirm their root causes and provide feedback to the appropriate team to drive corrective actions.
Avalon™ and SysNav™ provide the ability to quickly cross-reference between schematic and layout to investigate device failures and provide the ability to link to FA equipment in order to position the stage at the exact location of interest on the failing device under test (DUT). By leveraging a full spectrum of design data, Avalon and SysNav allow quick and seamless correlation between schematic, layout and FA equipment for efficient circuit analysis and debug. Therefore, a comprehensive CAD database that is tailored for FA plays an vital role in meeting a semiconductor company’s TTM objectives.
Accelerating Package Failure Analysis Using SysNav™
Lesly Endrinal, Principal FA Engineer | Ginger Baker, Sr. Support Engineer, Database Administrator, Qualcomm Technologies, Inc.Share this post via: