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CDNLive Israel 2019
September 18, 2019
David Intercontinental Hotel – Tel Aviv, Israel
CDNLive Israel brings together Cadence technology users, developers, and industry experts for networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems that transform the way people live, work, and play.
Tell Your Story
Whatever your design specialty, CDNLive Israel is an excellent opportunity to share your experiences and insights on key technical and industry issues. Submit an abstract for consideration at the 2019 conference.
|Call for presentations opens||June 6, 2019|
|Call for presentations closes||July 12, 2019|
|Acceptance notification||July 21, 2019|
|Draft presentations due||August 24, 2019|
Hot Topics for 2019:
- Mastering advanced-node design challenges
- Addressing design and verification for automotive applications
- Accelerating SoC integration with Interface IP
- Software-driven verification and applying the Portable Stimulus Standard
- Designing in DDR memory
- Analog/mixed-signal SoC verification
- Simplifying functional verification with Verification IP
- PCB design for manufacturing and testability
- PCB high-density interconnect (HDI) and flex designs
- Silicon photonics
- Low-power design and verification considerations
- Digital design and full-flow correlation
- Vision processing
- Audio processing
- Embedded processing
- Analysis and modeling of high-speed serial links
- Power delivery network (PDN) design and analysis
- IC packaging and heterogeneous integration
- Early software development and high-performance system validation
- And many more
We are seeking presentations on design topics that illustrate your experiences with Cadence® products, solutions, flows, methodologies, and techniques as described below.
Cadence technologies: Presentations should share experiences with Cadence technology and illustrate exciting ways in which design and verification teams have successfully used these technologies on their most recent projects.
Design methods and case studies: Presentations should describe innovative methodologies or specific examples that highlight design flows using Cadence methodologies to develop cutting-edge silicon, SoCs, and full systems.
Design techniques: Presentations should describe interesting and innovative design experiences related to specific design projects. These submissions should be more “how to” in nature, include a brief description of the design, and discuss methodology, flow, and innovative use models.
Abstract submissions should be no more than 2,500 characters, clearly stating the significant contribution, impact, and results of the submission. All abstracts will be reviewed. Authors of accepted presentations must sign a copyright release form for their presentation. Notice of acceptance will be sent via email. Examples of last year’s presentations can be viewed here.