Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough.  Heterogeneous multicore systems including ASIPs are now becoming more mainstream. Domains such as artificial intelligence, image and video processing or automated driving assistance have fueled the development of such ASIPs, and triggered many university projects.  Processor design projects such as the RISC-V initiative also initiated a lot of interest.  With all the commercial activity around RISC-V these days, it has outgrown UC Berkeley.

Synopsys ASIP Designer is the market leading tool for ASIP design, verification, and programming. It is used by leading companies around the globe with hundreds of successful projects to date.

At this informal event, leading university teams will present results from their ongoing ASIP projects in a variety of application domains. Synopsys will share insight on market trends, and provide a technical update on ASIP Designer along with reference examples.