One of my favorite traditions at the Design Automation Conference is the Synopsys foundry events (the videos are now available). I learned a long time ago that the foundries are the foundation of the fabless semiconductor ecosystem and your relationships with the foundries can make or break you, absolutely. I also appreciate the free food, food tastes much better when it’s free.
Synopsys has an advantage being not only the number one EDA company but also the number one IP provider with the largest IP portfolio known to semiconductor man or woman. You can bet Synopsys tools and IP are silicon proven on every edge of the process technology spectrum (leading through trailing) without a doubt. One of the benefits of live events of course is that you get to mingle with the crowd and speakers which includes ecosystem executives from all over the world and don’t be surprised if Aart de Geus or Chi-Foon Chan are breaking bread at your table.
My favorite breakfast of course is the one with my semiconductor bellwether TSMC. Willy Chen, Deputy Director, Design Methodology and Service Marketing, TSMC, is a great speaker and very transparent in what he presented last year versus this year. Willy is a very smart and fashionable guy and very approachable so approach him if the opportunity presents itself. Kelvin Low (Moderator), VP of Marketing, Physical Design Group, Arm is also a great speaker. Kelvin spent the first half of his career with foundries (Chartered, GF, and Samsung) and is now IP. Hopefully next he will go into EDA completing the ecosystem trifecta! Also speaking were Kiran Burli, Director, Solutions Marketing, PDG, Arm and Joe Walston, Principal Engineer, Synopsys.
Designing with Leading-Edge Process Technology, CPU Cores and Tools
Faster, smaller, cooler product requirements continue to challenge designers to achieve their targets. TSMC, Arm and Synopsys kicked off DAC 2018 to share results of their collaboration to address these challenges to enable optimized design and accelerate design closure for Arm®-based designs on the latest TSMC process technology using the Synopsys Design Platform. This event video introduces the new Synopsys QuickStart Implementation Kits (QIKs) for ARM® Cortex®-A76 and Cortex-A55 processors that take advantage of ARM POP™ technology and Synopsys tools, and the collaborative design enablement for TSMC 7-nm process technology.
My beautiful wife joined me for the GlobalFoundries dinner which was focused on FD-SOI. As you know I am a big fan of FD-SOI which we track closely on SemiWiki. In fact, Scotten Jones just did a very nice FDSOI Status and Roadmap last month following SEMICON West. Kripa Venkatachalam, Director of Product Management, GLOBALFOUNDRIES, did a very nice presentation followed by Wayne Dai, President and CEO, VeriSilicon, and Jacob Avidan, SVP of Design Group R&D, Synopsys.
Addressing the Design Challenges of IoT Wearables and Automotive with 22FDX Technology
In this video of the Synopsys and GLOBALFOUNDRIES dinner panel event at DAC 2018, you will hear a discussion of how GLOBALFOUNDRIES’ innovative FDX process coupled with Synopsys’ design tools are providing mobile, IoT and automotive chip designers with the low-power and high-performance technology required for product success. VeriSilicon shared some specific examples of their successes with GLOBALFOUNDRIES’ 22FDX process and Synopsys tools. The event concluded with a panel discussion on various aspects of designing with 22FDX and addressing barriers to adoption of this technology.
Last but not least was the Samsung breakfast featuring Robert J. Stear, Senior Director, Samsung Foundry; JC Lin, Vice President of R&D, Synopsys; and John Koeter, Vice President of Marketing, Synopsys. Samsung has made great ecosystem strides in the past few years and is clearly experiencing the benefits. In fact, Samsung is holding a Tech Day on October 17[SUP]th[/SUP] in San Jose. If you have a golden ticket I hope to see you there. Tom Dillinger and I will be covering it for SemiWiki.
EUV is a very hot topic and Samsung is leading the way with their 7nm EUV process. Scott Jones has also covered Samsung and EUV with Samsung 10nm 8nm and 7nm at VLSIT and SEMICON West – Leading Edge Lithography and EUV
Enabling Optimal Design with Samsung 7nm EUV Process Using the Synopsys Design Platform
As each new process technology brings with it significant advantages as well as design challenges, Samsung Foundry and Synopsys continue to collaborate to enable optimal design. At this event, you’ll learn how our efforts provide a robust foundation for designers to get the most from Samsung advanced process technologies using Synopsys’ Design Platform with Fusion Technology and state of the art IP.
Take a look at the videos and let’s talk foundries in the comment section…