WEBINAR: Analyzing PowerMOS Devices to Reduce Power Loss and Improve Reliability

The symbol for a PowerMOS device in a converter circuit schematic looks simple enough. However, it belies a great deal of hidden complexity. A single device is actually a huge array of parallel intrinsic devices connected together to act as a single high power device. While their gate lengths are small, as with many other MOS devices, the effective gate width (W) can reach up to many meters. Rows and rows of intrinsic devices need to be connected so that the high current for the device is distributed among these with minimal and uniform resistance. The total resistance of the complex internal metal structures and the connected intrinsic devices determine power loss during device operation, having a large effect on circuit efficiency. Inefficient circuits, depending on their application, can require more cooling, cost more to operate or may suffer from shortened battery life.

WEBINAR: Analyzing PowerMOS Devices to Reduce Power Loss and Improve Reliability

In order to optimize resistance from the device source to drain terminals (Rdson), you need a way to measure it. Unlike top level IC routing, metal structures in PowerMOS devices feature all angle geometry, wide metal, large via arrays and multiple parallel current paths. Extracting this kind of metal structure requires a solver-based extractor that can work with high accuracy on large complex geometry.

To help PowerMOS and converter circuit designers better understand how to accomplish this, Magwel is offering a free webinar on their Power Transistor Modeler (PTM®) which is being used on some of the largest Power MOS devices in production today to predict Rdson and power per layer, and to flag electromigration (EM) violations. The webinar will discuss the types of devices that PTM can be used with. It will also go over the set up and talk about performance and accuracy.

Magwel is a leader in developing tools for analyzing PowerMOS devices using solver-based technology. The PTM family also has tools for analyzing electrothermal properties of PowerMOS devices during their operation, taking into consideration the thermal properties of the die, package and board, and for co-simulation of PowerMOS transient switching behavior in circuit level SPICE simulations.

Sign up for this interesting look into how many leading Power Converter design companies ensure that their PowerMOS devices are optimized for power, performance and reliability. Information and registration for this webinar can also be found at the Magwel website.

About Magwel
Magwel® offers 3D field solver and simulation based analysis and design solutions for digital, analog/mixed-signal, power management, automotive, and RF semiconductors. Magwel® software products address power device design with Rdson extraction and electro-migration analysis, ESD protection network simulation/analysis, latch-up analysis and power distribution network integrity with EMIR and thermal analysis. Leading semiconductor vendors use Magwel’s tools to improve productivity, avoid redesign, respins and field failures. Magwel is privately held and is headquartered in Leuven, Belgium. Further information on Magwel can be found at www.magwel.com