Automotive applications are one of the hottest domains today in semiconductor design. We’re bombarded daily with articles on new hybrids, electric cars, ADAS and autonomous cars, trucks and busses. All of these applications are certainly amazing, but the devices that make them work still have to deal with the same old challenges, often amplified in the cabin / body / drivetrain of a vehicle. One of these is noise in all its many manifestations, particularly (in this context) the noise impact of digital electronics sitting right next to analog circuitry on the same device.
A lot of what we read about managing noise, particularly between analog and digital circuitry, seems to start from the assumption that the noise source is immutable and what we need to manage is immunity to that source, through shielding, decoupling, separated power and ground planes, and so on. All of these methods are of course important, but there is also value in challenging that assumption of immutability. If the design can be modified to reduce noise generated by the digital circuitry, that should be a big win.
A while ago, ANSYS sponsored a webinar on just this topic, centering on a presentation by Dr. Peter Blinzer of NXP Hamburg. Although this isn’t hot off the presses, I think it is arguably even more important today, as mixed analog and digital content appears throughout infotainment devices, sensor fusion and other AMS functions in advanced automotive electronics. It’s also, I think, a creative application of a tool you wouldn’t normally associate with noise management.
What generates noise in digital circuitry is switching. The other thing greatly influenced by switching is dynamic power consumption. So, unsurprising, noise and dynamic power are related. But did you ever think about RTL power optimization as a way to also reduce noise? Peter Blinzer did, and came up with some compelling results.
Optimizing power is always a good thing; you work at reducing power until you hit whatever power budget you were given, then you stop, right? But if switching also affects noise, is hitting the power budget the right place to stop? Maybe not – maybe some further tweaking will pay off in noise reduction. Peter illustrated this through his analysis and optimization of a digital radio IC used in infotainment systems. He starts by showing a very detailed analysis of signal to noise in such a radio and the frequencies (including digital clock frequencies and related harmonics) and root causes where noise can dramatically reduce the quality of reception. These are what he wanted to reduce.
Peter ran PowerArtist analyses on multiple use-cases, looking for opportunities to reduce power. In one case, he found that a digital controlled oscillator (DCO) should have been gated off, but was actually still on. That’s also a pointer to unnecessary noise. By fixing clock gating, power was reduced naturally. We’ll get to overall noise impact next. In fact, similar analysis pointed to opportunities to improve gating on multiple DCOs. More power reductions, together with others adding up to a 60% power saving in the digital PLL alone.
Impact on noise, as measured in layout-based dynamic power simulations, was just as striking. This took total power from an average of ~30mA with noise of ~15mA down to ~5mA with noise of maybe ~1mA. Similar results were apparent in a frequency spectrum analysis, where most of the original noise contributors were reduced by almost 20dB, below the level where they can be a serious threat to reception quality (a few were not reduced but these were sources outside the scope of this analysis).
Peter noted several RTL changes they made to implement these improvements – replacing floating-point arithmetic with fixed-point, optimizations in clock gating and optimization of test-support logic. They were careful also to avoid over-constraining the design – naturally to avoid excess power but equally to limit noise. Not something we might normally consider.
To get more detail on this lateral-thinking approach to noise management in AMS designs, you can watch the webinar HERE.Share this post via: