WP_Term Object
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 258
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 258
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157

Chip-Package-System Webinar

Chip-Package-System Webinar
by Paul McLellan on 08-05-2011 at 5:14 pm

 The webinar on CPS (chip-package-system) is on Tuesday 9th August at 11am Pacific time. It will be conducted by Christopher Ortiz, Principal Application Engineer at Apache Design Solutions. Dr. Ortiz has been with Apache since 2007, supporting the Sentinel product line. Prior to Apache he worked at Agere / LSI, where he investigated on-chip signal and power integrity challenges for advanced SoC designs. He received his Ph.D. in physics from the University of Notre Dame.

A complete Chip-Package-System co-design/co-analysis solution addressing system-level power integrity, SSO, thermal, and EMI challenges. Apache’s Sentinel™combines the chip’s core switching power delivery network, I/O sub-system, and IC package/PCB modeling and analysis in a single environment for accurate CPS convergence, from early stage prototyping to sign-off.

To register for the webinar go here.

More details on the whole series of webinars here.

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