WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 257
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 257
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)
ansys sim world 2024 800X100 reg a (1) 
WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 257
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 257
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)
Ansys, Inc.
Posted on by Paul McLellan

Apache Dimensions of Electronic Design Seminars

Apache Dimensions of Electronic Design Seminars
by Paul McLellan on 10-07-2012 at 1:17 pm
Categories: Ansys, Inc., EDA

Coming up are ANSYS/Apache seminars on Dimensions of Electronic Design. Watch the video where Arvind Shanmugavel gives some details about why you should attend. Probably most readers are in Silicon Valley, and the seminar here is on 18th at the Hyatt (next to Santa Clara convention center).

The seminars are free to qualified attendees. However, seating is limited so you must sign up in advance. The registration page is here.

There are four seminars currently scheduled:

  • Thursday October 11th at Sheraton Framingham MA. Detailed agenda.
  • Thursday October 18th at Hyatt Regency Santa Clara CA. Detailed agenda.
  • Wednesday October 24th at Manhattan Beach Marriott CA. Detailed agenda.
  • Thursday November 1st at Hyatt Regency Austin TX. Detailed agenda.

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