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Secure Processor for IoT

Secure Processor for IoT
by barun on 02-16-2015 at 1:00 pm

 In my last blog “Processor for IoT” I have discussed security as one of the key requirements for processor used in IoT devices. In this blog we will analyze different method of hacking and some techniques which can be used to prevent those security breaches.

One of the common ways of attack is to probe address and data bus between processor and memory/ IO devices. The attacker can monitor or override information on those buses. The easiest method of preventing such attack is to encrypt any information (data or address) going out of processor and decrypt them before use inside the processor. This can ensure the confidentiality of the information. To ensure integrity of the information, i.e. the data is not corrupted by an external source; one can add a signature using encryption methodology on the block before sending out of the processor to the memory. When the data is again retrieved from memory the same operation is performed and both the signatures are compared to ensure data integrity. Both encryption and authentication can be performed together by a range of algorithms, commonly referred to as, authenticated encryption.

Now the issue is both the techniques is extra latency delay generated by the encryption and decryption mechanism as well as additional area overhead needed. Particularly the latency may become a critical issue if processor’s response time is required to be low like in real time application environment. One of the remedy deployed is to have dedicated crypto processor where the encryption and decryption are implemented in hardware leaving the main processor free for regular computation.

The next question on security arises where to store the key which is used for encryption and decryption. The key should be protected from outside attacks; otherwise the encryption and decryption will have no impact. Typically the key used to be stored in an on chip non volatile memory. But it may include the cost of manufacturing as it may need some special fabrication process (like EEPROM).

But these processes are not fully secured from physical attacks where the hacker has physical access of the chip and can extract the secure information by timing analysis, power analysis. Usage of physically un-clonable function (PUF) is a solution of this solution. In PUF the key is generated from the physical characteristics of a particular chip (for example delay of a particular circuit in a chip). Even if the hacker knows the circuit used to generate the key he cannot reproduce the same delay due to the variations of manufacturing process. Also this does not need any extra manufacturing process.

Another techniques used by designer to prevent timing attack is to introduce random delay to prevent attacker know the timing of its desired operation from reset of the system. To make it more effective the time period of the clock itself is randomized in low frequency application like smartcard. Designer can also impose randomness in the power consumption, electromagnetic radiation to prevent power analysis and electromagnetic analysis attacks respectively.

Trojan is another new way which new generation hackers are using to change the functionality of a circuit from its normal mode and make the circuit behave as per hacker’s need to extract confidential information from the circuit. Trojans are small module which is put by a hacker who has access to design files of an SoC or it may comes from a third party module which is reused inside an SoC. Trojans are typically dormant and hence make it difficult to get identified in the circuit. But in some rare event, Trojan gets activated. To prevent this circuit designer put a small monitoring block which monitors the functionality of different portion of the circuit and flags an error whenever any abnormality in circuit functionality is observed.

Barun Kumar De, Senior Business Development Manager – SmartPlay Technologies


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