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TSMC ♥ Solido

TSMC ♥ Solido
by Daniel Nenni on 04-27-2013 at 8:00 am

Process variation has been a top trending term since SemiWiki began as a result of the articles, wikis, and white papers posted on the Solido landing page. Last year Solido and TSMC did a webinar together, an article in EETimes, and Solido released a book on the subject. Process variation is a challenge today at 28nm and it gets worse… Read More


Morris Chang on Altera and Intel

Morris Chang on Altera and Intel
by Daniel Nenni on 04-25-2013 at 7:00 pm


If you want to know why I have written so much about TSMC in the past five years here it is: TSMC executives are approachable, personable, answer questions straight on, and have yet to lead me astray. If you want an example of this read the Chairman’s comments on the TSMC Q1 2013 earnings call transcript.

“On 16-nanometer FinFET, we Read More


Cadence ♥ TSMC

Cadence ♥ TSMC
by Daniel Nenni on 04-19-2013 at 6:00 pm

TSMC has been investing in the fabless semiconductor ecosystem for 25+ years and that is why they are the #1 foundry and lead this industry (my opinion). I’m a big fan of joint webinars. Not only is it collaboration open to the masses, it is a close collaboration between the two sponsoring companies. Having worked on the TSMC… Read More


Altera, Intel, TSMC, ARM: the Plot Thickens

Altera, Intel, TSMC, ARM: the Plot Thickens
by Paul McLellan on 04-16-2013 at 7:15 pm

Vince Hu of Altera presented us her at the GlobalPress Electronics Summit on their process roadmap. Since just a month or two ago they announced that Intel would be their foundry at 14nm, everyone wanted to get a better idea of what was really going on.

At 28nm, Altera use 2 processes, TSMC 28HP (for high end Stratix-5 devices) and TSMC… Read More


Two New TSMC-Cadence Webinars for Advanced Node Design

Two New TSMC-Cadence Webinars for Advanced Node Design
by Daniel Payne on 04-15-2013 at 3:43 pm

Foundries and EDA vendors are cooperating at increasing levels of technical intimacy as we head to the 20nm and lower nodes. Cadence has a strong position in the EDA tools used for IC design and layout of custom and AMS (Analog Mixed-Signal) designs. They have created a series of webinars to highlight the design challenges and new… Read More


TSMC Responds to Samsung!

TSMC Responds to Samsung!
by Daniel Nenni on 04-12-2013 at 10:00 pm

This was the 19[SUP]th[/SUP] annual TSMC Symposium and by far the best I have attended. Finally tired of the misinformation that plagues our industry, TSMC set the record straight with wafer and silicon correlated data. TSMC shipped more than 88 MILLION logic wafers in 2012, more than any other semiconductor company, that gives… Read More


How Long Does it Take to Go From a Muddy Field to Full 28nm Capacity?

How Long Does it Take to Go From a Muddy Field to Full 28nm Capacity?
by Paul McLellan on 04-09-2013 at 4:02 pm


TSMC has a lot of capacity. Not just that, it has a lot more under construction. It currently has 3 300mm Gigafabs, fabs 12,14 and 15 (there doesn’t seem to be a 13). This morning, Dr Wang, who is TSMC’s VP of 300mm operations told us about the expansion plans. Currently fab 15 phase 3 and 4, and fab 12 phase 3 are to be ramped… Read More


FinFET Design Challenges Exposed!

FinFET Design Challenges Exposed!
by Daniel Nenni on 04-07-2013 at 6:00 pm

The first mention of FinFETs appeared on SemiWiki after the ISSCC conference in 2011. Dr. Jack Sun, TSMC Vice President of R&D and Chief Technology Officer, spoke about the power crisis the semiconductor industry is facing and FinFETs was one of the promising technologies that could help us. Since then, we have posted 100+ … Read More


TSMC to Talk About 10nm at Symposium Next Week

TSMC to Talk About 10nm at Symposium Next Week
by Daniel Nenni on 04-02-2013 at 8:05 pm

Given the compressed time between 20nm and 16nm, twelve months versus the industry average twenty four months, it is time to start talking about 10nm, absolutely. Next Tuesday is the 19th annual TSMC Technology Symposium keynoted of course by the Chairman, Dr. Morris Chang.

Join the 2013 TSMC Technology Symposium. Get the latest
Read More


TSMC Tapes Out First 64-bit ARM

TSMC Tapes Out First 64-bit ARM
by Paul McLellan on 04-02-2013 at 2:15 am

TSMC announced today that together with ARM they have taped out the first ARM Cortex-A57 64-bit processor on TSMC’s 16nm FinFET technology. The two companies cooperated in the implementation from RTL to tape-out over six months using ARM physical IP, TSMC memory macros, and a commercial 16nm FinFET tool chain enabled by… Read More