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Can FD-SOI Change the Rule of Game?

Can FD-SOI Change the Rule of Game?
by Pawan Fangaria on 06-18-2015 at 12:00 pm

It appears so. Why there is so much rush towards FD-SOI in recent days? Before talking about the game, let me reflect a bit on the FD-SOI technology first. The FD-SOI at 28nm claims to be the most power-efficient and lesser cost technology compared to any other technology available at that node. There are many other advantages from a technology standpoint which we have heard over a year or two. For example, simplicity of process, no channel doping, excellent electrostatic control of the channel, and back biasing with extremely thin box. These technology aspects translate into limited short channel effect, low DIBL (Drain Induced Barrier Lowering), minimum junction capacitance and diode leakage, lowest leakage current, and excellent voltage threshold variability. The result is – the device can operate at multiple voltages and multiple frequencies. It can be used for high-performance (at 28nm at this time) as well as ULP (Ultra-Low-Power) applications.

[Courtesy ST: FD-SOI transistor structure; SRAM SER comparison]

Okay, I’m not showing the power graphs here as they are widely known for FD-SOI technology. Just see the interesting Soft Error Rate (SER) comparison bar chart obtained at ST for SRAMs. It is the minimum in case of FD-SOI and that improves reliability of devices with FD-SOI technology. Reliability, low-power, and low-cost are the key requirements for IoT applications. Also, the technology has lot of benefits for analog and high-speed designs because of lower gate capacitance and leakage current and latch-up immunity. The device also has lower noise and higher gain because of the absence of channel doping and pocket implants.

Now, let’s see how the rule of game is changing. At 28nm, there is no FinFET to compare with. The FD-SOI technology stands tall against all others with all the advantages mentioned above. Is that the only reason for the rush towards FD-SOI at this juncture? There is something more to it; the semiconductor business scenario, the economy, and the trending segments. In next couple of years IoT is supposed to be the top growing segment. Also, IoT applications do not require 16nm, 14nm, or below technology nodes. The 28nm process node seems to be ideal for IoT applications as they need low power at low cost. The 28nm process also looks good for analog ICs which will be a key requirement for the IoT market.

This is the most opportune time for foundries (ST being in the leadership position for FD-SOI), chip and IP developers, EDA vendors, and service providers to avail the opportunity provided by FD-SOI.

During 52[SUP]nd[/SUP] DAC, CEA-Letimade a big announcement about the launch of “Silicon Impulse”, a platform aimed at broadening the use of FD-SOI technology for ultra-low-power devices that are used in IoT applications and other energy-efficient equipments. The platform will offer technical expertise for developing energy-efficient solutions along with access to FD-SOI technology and manufacturing facilities. The service will include infrastructure support such as emulator and other test services along with industrial multi-project wafer (MPW) shuttles. The platform has partners from wide spectrum of semiconductor ecosystem including academia, foundry, EDA providers and chip designers. The list of partners with CEA-Leti includes CEA-List, STMicroelectronics, Dolphin Integration, CMP, Mentor Graphics, Cortus, and Presto Engineering.

The collaboration and partnership is not limited to ‘Silicon Impulse’ platform partners. There are also other partnerships happening around the world. Sankalp Semiconductoris an Indian origin company, leading in SoC chip design services and specializing in end-to-end solutions for IOs, Analog and Mixed-Signal chip designs. It has multiple design centers in India and USA. Recently, just before DAC, Sankalp announced FD-SOI services and IP partnership with ST. Sankalp has been involved in the development of many FD-SOI analog IP and high-speed PHYs for ST. Sankalp has developed significant expertise about FD-SOI technology and its usage in various applications. With FD-SOI technology, Sankalp feels confident to serve for the emerging IoT, wearable, consumer, multi-media and automotive markets.

See the press release about Sankalp and ST partnership here.

To accelerate the global footprint for FD-SOI technology based development, CEA-Leti is also hosting a workshop on June 22-23 where an expanded representation from the semiconductor community will take place. The presenters include –

  • ST, GLOBALFOUNDRIES and Samsung on FDSOI manufacturing
  • Ciena, ST and NXP on products based on FDSOI chips
  • Cadence, Synopsys, Mentor Graphics, sureCore, eSilicon and Tiempo on their offers for FDSOI in terms of IP and EDA tools

Also, there will be prominent professors from world-class universities along with Leti who will present about their research and innovations in designs with FD-SOI.

It’s exciting to see the FD-SOI ecosystem growing so fast, definitely there is merit in this technology. One may argue about 14nm FinFET technology superiority in terms of performance. However, I hear that ST will soon bring 14nm FD-SOI up to speed. So, by the time IoT market matures with 28nm FD-SOI, 14nm FD-SOI will become available for mainstream design. Does that seem like FD-SOI game?

By the way, if anyone is interested in attending the FD-SOI workshop, it is in Grenoble, France. Registration link is here.

Pawan Kumar Fangaria
Founder & President at www.fangarias.com

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