The Alternative to FinFET: FD-SOI

Everywhere you turn these days you find FinFETs. Intel has had them since 22nm (they use the word Tri-gate but it is the same as what the world calls FinFET) and TSMC will have them at 16nm. So why FinFET? And is there an alternative?

The reason that regular bulk planar transistors have run out of steam is that the channel area underneath the gate is too deep and too much of the channel is too far away from the gate to be well-controlled. This is why leakage power (static power) has been going up so much: the gate is never truly turned off. Transistors are bright and dim not on and off. The solution to this problem is to make the channel thinner so that it is well controlled by the gate.

One way to do this is the FinFET. Instead of having a planar transistor with the channel in the silicon wafer itself, the channel is created as a thin vertical fin (like a shark’s fin, which is where the name comes from). The gate is then wrapped around three sides of the fin. Since the fin is thin, there is no part of it that is far from the gate and so the whole channel is well controlled by the gate. Leakage power goes way down. Life is good.

But is there another way to make the gate thin? Yes, it turns out that there is. Instead of making the channel area out of the silicon wafer itself, start with an insulator and add a thin layer on top of it to form the channel. Then build a planar gate on top of it in the normal way, along with source and drain. With the insulating layer at the back, the channel is thin and so, like in the FinFET case, it is well-controlled by the gate. Leakage power goes way down. Life is good.

This is the approach that ST Microelectronics is using with the not-exactly-catchy name of FD-SOI which stands for Fully-Depeleted Silicon-On-Insulator. The main coordination for FD-SOI technology is the SOI Industry Consortium. In addition to ST, semiconductor members include Freescale, IBM, GlobalFoundries, Samsung and UMC, although the detailed process roadmaps are not clear yet. Notable by their absence are Intel and TSMC who are both committed to FinFET exclusively.

FD-SOI has some advantages over FinFET since it is much more similar to a regular bulk CMOS transistor. The manufacturing is more of an incremental development from what has gone before and is simpler. So it should be cheaper to manufacture than FinFET (although the base wafers are more expensive). Design re-use is also much simpler.FD-SOI has a lot less variability due to the lack of implant, and in turn this means that the supply voltage for memories can be lowered by 150mV resulting in 30-40% power savings.

More information on FD-SOI is available on ST Microelectonics’ website here.