At IEDM 2023, Naoto Horiguchi presented on CFETs and Middle of Line integration. I had a chance to speak with Naoto about this work and this write up is based on his presentation at IEDM and our follow up discussion. I always enjoy talking to Naoto, he is one of the leaders in logic technology development, explains the technology in … Read More
Keynote and expert presentations, fireside chat, and industry networking
Driving an ambitious chip strategy, Japan is firmly intensifying its efforts to create advanced semiconductors.
Imec is proud to be a longstanding R&D partner for many leading companies across the Japanese industry and commits to further support
Harry Peterson is a mixed-signal chip designer with a BS in Physics from Caltech. He managed IC design groups within Fairchild, Kodak, Philips, Northern Telecom, Toshiba and Pixelworks. During sabbaticals he helped fly experiments on NASA’s orbiting satellite observatory (OSO-8) and build telescopes in the Canary… Read More
The SPIE Advanced Lithography Conference was held in February. I recently had the opportunity to interview Steven Scheer, vice president of advanced patterning process and materials at imec and review selected papers that imec presented.
I asked Steve what the overarching message was at SPIE this year, he said readiness for … Read More
Imec’s flagship event on semiconductor advances & deep-tech solutions
formerly known as Future Summits.
Semiconductors have become increasingly instrumental – and often even dominant – for the future of industries and application domains worldwide.
For many decades, imec has played a major role in the global semiconductor
At the IEDM conference in December 2022, Imec presented “Semi-damascene Integration of a 2-layer MOL VHV Scaling Booster to Enable 4-track Standard Cells,” I had a chance to not only read the paper and see it presented, but also to interview one of the authors Zsolt Tokie.
Logic designs are built up by standard cells such as inverters,… Read More
SEMICON West 2022 was held from July 12th to 14th at the Moscone Center in San Francisco.
On Monday the 11th before the show, Imec held a technology forum at the Marriott Marquee right around the corner from the Moscone center. In recent years the Imec forums have shifted away from the process technology I cover to more of a system and… Read More
At the VLSI Technology Symposium Imec presented on Buried Power Rails (BPR) and Backside Power Delivery (BSPD) in a paper entitled: “Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails”. I recently had a chance to interview one of the authors, Naoto Horiguchi about the work. I have interviewed … Read More
Especially inside the large data centers that underpin today’s cloud and internet infrastructure, traffic keeps growing exponentially. As a result, the industry is now looking at 800G- and even 1.6T-capable optical (pluggable)
Today, the CMOS chip manufacturing is the pinnacle of the human technology defining economy, society and perhaps us as modern humans. This was highlighted by the recent chip shortage, followed by the ‘shocking’ realization that more than 80% of all chips are manufactured in the Far East.
Important decisions need to be taken by … Read More