The foundry problem continued to plague us at Actel. We had a really complex process! But —- we needed state of the art feature sizes if we were to compete with Xilinx. TI and Matsushita had been doing a good job for us, but not in fabs with state of the art technology. We were two process generations behind! At two generations… Read More
Tag: amd
Actel TI and TSMC Foundry Woes
TSMC was founded in 1987 by Morris Chang. At about the same time, I was wrestling with the question of whether or not to join Actel. Morris had been a top executive at Texas Instruments during the period when TI took ownership of the TTL market. (See my week #8. Texas Instruments and the TTL Wars) I have to admit that when I first … Read More
What Fairchild, AMD, Actel and Jurassic Park Have in Common
Me.
In the early stories of this series (Weeks three though six), I talked about what I believe were the three seminal events in the history of the semiconductor: Shockley’s invention of the transistor, Noyce’s invention of the integrated circuit, and Intel’s 1971 — the introductions of the first commercially successful… Read More
#56thDAC Discussion on Calibre in the Cloud Brings Sunshine to SOC Developers
It was inevitable that EDA applications would meet the cloud. EDA has a long history of creating some of the most daunting compute challenges. This arises from employing current generation chips to design the next generation chips. Despite growing design complexity, many tools have kept pace and even reduced runtimes from generation… Read More
Google Stadia is Here. What’s Your Move, Nvidia?
On March 16, 2019, Google introduced the world to its cloud-based, multi-platform gaming service, Stadia. Described as “a gaming platform for everyone” by Google CEO Sundar Pichai at the Game Developers Conference, Stadia would make high-end games accessible to everyone. The video gaming industry, as we know it, will never … Read More
Next-Generation Formal Verification
As SoC and IP designs continue to increase in complexity while schedules accelerate, verification teams are looking for methodologies to improve design confidence more quickly. Formal verification techniques provide one route to improved design confidence, and the increase in papers and interest at industry conferences… Read More
The real race for superiority is TSMC vs Intel
Recent talk of AMD vs Intel market share share is misguided, the real race for superiority is TSMC vs Intel underlying that, tech dominance between US & China.
There has been much discussion of late about market share between Intel and AMD and how much market share AMD will gain at Intel’s expense due to Intel’s very… Read More
Data Security – Why It Might Matter to Design and EDA
According to the Economist, “The world’s most valuable resource is no longer oil, but data”. Is this the case?Data is the by-product ofmany aspects of recent technology dynamics and is becoming the currency of today’s digital economy. All categories in Gartner’s Top10 Strategic Technology Trends for 2018 (Figure… Read More
Choosing the lesser of 2 evils EUV vs Multi Patterning!
For Halloween this week we thought it would be appropriate to talk about things that strike fear into the hearts of semiconductor makers and process engineers toiling away in fabs. Do I want to do multi-patterning with the huge increase in complexity, number of steps, masks and tools or do I want to do EUV with unproven tools, unproven… Read More
Synopsys Opens up on Emulation
Synopsys hosted a lunch panel on Tuesday of DAC this year, in which verification leaders from Intel, Qualcomm, Wave Computing, NXP and AMD talked about how they are using Synopsys verification technologies. Panelists covered multiple domains but the big takeaway for me was their full-throated endorsement of the ZeBu emulation… Read More