If you are a TSMC customer, no doubt you have heard TSMC is requiring lithography and planarity analysis for all 45nm designs. Their website says customers can either run it themselves, or contract TSMC services to do it. The most cost-effective way would be for the customers to run it themselves, but some might not have the resources… Read More
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So, Why Not Just Write Better Rules?
In my submission about TSMC making some DFM analysis steps mandatory at 45nm (see “TSMC’s DFM Announcement”), I ended with a question about why the foundries can’t just write better design rules (and rule decks) to make sure all designs yield well. Here’s my take on this complicated question.… Read More
TSMC’s DFM Announcement
If you are a TSMC customer, no doubt you have heard TSMC is requiring lithography and planarity analysis for all 45nm designs. Their website says customers can either run it themselves, or contract TSMC services to do it. The most cost-effective way would be for the customers to run it themselves, but some might not have the resources… Read More
Effects of Inception
I finally got to watch the critically acclaimed sci-fi movie “Inception” last weekend and life has not been the same since. Without giving away too much detail for the benefit of those who have not watched it yet, the main plot involves dreams within dreams within dreams – three levels to be precise—to “incept” an idea into … Read More
Semiconductor Manufacturing International Corporation 2010
In celebrating the 10th anniversary of SMIC, CEO David Wang ushers in a new era of China semiconductor manufacturing with triumphs versus promises. By triumphs David means profits, which SMIC saw for the first time in Q2 2010. The future looks even brighter for SMIC as the China semiconductor demand versus supply gap is an estimated… Read More
TSMC OIP Conference 2010 Critique!
Okay, this is more of a, “What I would do if I was TSMC” than a critique, but I needed a one word descriptor for the title. This was the third TSMC OIP Conference and I would guess about 250 people attended. This was the first time I have seen TSMC in “reactive” mode versus “proactive” leadership mode, so I was a bit disappointed. TSMC is … Read More
Critical Area Analysis and Memory Redundancy
Simon Favre, one of our Calibre Technical Marketing Engineers, presented a paper on Critical Area Analysis and Memory Redundancy at the 2010 IEEE North Atlantic Test Workshop in Hopewell Junction, NY, just up the road from Fishkill. As Simon says…
Fishkill, New York. IBM is in Fishkill. IBM invented Critical Area Analysis in what,… Read More
Semiconductor Forecast 2010-2011 Update!
It’s that time of the quarter again, where the semiconductor analysts revise forecasts, passing off glorified guesstimates as valid financial planning data. They aren’t forecasts! They are observations! I blame these hacks for the 12.5% Silicon Valley unemployment rate! I blame these hacks for the dwindling available capitol… Read More
TSMC GigaFab Tour!
During my most recent Taiwan trip I was not only afforded a meeting with Dr Mark Liu, Sr VP of TSMC, a guided tour of GigaFab #12 was also included. Even more impressive, I’m now considered “Elite” by Eva Airlines so I automatically get the good seats, better food, and VIP service. My wife, however, is not impressed with my Elite status… Read More
Semiconductor Realization!
Insanity is doing the same thing over and over again and expecting different results (Albert Einstein). Given that statement, according to John Bruggeman (Cadence CMO and EDA360 Chief Anarchist) the semiconductor industry is INSANE!
This year the EDA Tech Forum and the Global Semiconductor Alliance Expo were not only on the … Read More
TSMC OIP Ecosystem Forum Preview 2024