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TSMC Tapes Out First 64-bit ARM

TSMC Tapes Out First 64-bit ARM
by Paul McLellan on 04-02-2013 at 2:15 am

TSMC announced today that together with ARM they have taped out the first ARM Cortex-A57 64-bit processor on TSMC’s 16nm FinFET technology. The two companies cooperated in the implementation from RTL to tape-out over six months using ARM physical IP, TSMC memory macros, and a commercial 16nm FinFET tool chain enabled by… Read More


GF, Analog and Singapore

GF, Analog and Singapore
by Paul McLellan on 04-01-2013 at 5:35 pm

The world is analog and despite enormous SoCs in the most leading-edge process node being the most glamorous segment of the semiconductor industry, it turns out that one of the fastest growing segments is actually analog and power chips in older process technologies. Overall, according to Semico, analog and power ICs, including… Read More


April 17-19: Overbooked!

April 17-19: Overbooked!
by Paul McLellan on 04-01-2013 at 4:23 pm

For three days in a couple of weeks time there is a crash of conferences, spread out all over the extended Bay Area.

Firstly, from 17-19th April at the Santa Clara Hyatt is the Linley Mobile Conference. This covers all things microprocessor in the mobile industry. Details of the conference including the full agenda are here. The conference… Read More


Clock Gating: Sequential Is Better

Clock Gating: Sequential Is Better
by Paul McLellan on 04-01-2013 at 3:46 pm

Sequential clock gating offers more power savings that can be obtained just with combinational clock gating. However, sequential clock gating is very complex as it involves temporal analysis over multiple clock cycles and examination of the stability, propagation, and observability of signal values.

Trying to do sequential… Read More


Power integrity: ground, and other fairy tales

Power integrity: ground, and other fairy tales
by Don Dingee on 03-31-2013 at 8:30 pm

Ground. It’s that little downward-pointing triangle that somehow works miracles on every schematic. It looks very simple until one has to tackle modern power distribution network (PDN) design on a board with high speed and high power draw components, and you soon discover ground is a complicated fairy tale with a lot of influences.… Read More


Tackling Circuit Level EM Analysis for RF, MMW and High Speed Analog Designs

Tackling Circuit Level EM Analysis for RF, MMW and High Speed Analog Designs
by Daniel Nenni on 03-31-2013 at 8:07 pm

Accuracy, ease of use and performance have always been paramount for electromagnetic analysis software. Historically, it has been hard to find all three of these qualities in one tool. The result is that many high speed analog and RF designers resort to using multiple, often overlapping, tools to get the job done.

Lorentz Solution… Read More


See Hogan’s Heroes at DAC 2013: The EDA Hunger Games!

See Hogan’s Heroes at DAC 2013: The EDA Hunger Games!
by Holly Stump on 03-31-2013 at 8:05 pm

Risks and Rewards of Engaging with EDA Startups:The Hunger Games!

Doing business with EDA startups comes with both risks and rewards. The Hogan’s Heroes panel at DAC 2013 features key decision makers from fabless, startup and vc firms sharing candid opinions on this risk/reward equation, and the financial and technical issues… Read More


Samsung 28nm Still Does Not Yield?

Samsung 28nm Still Does Not Yield?
by Daniel Nenni on 03-31-2013 at 7:00 pm

As if Samsung didn’t have enough to worry about with their new neighbor to the North (Korea) declaring war, Samsung 28nm is still NOT yielding. In my previous blog “Can Samsung Deliver as Promised?” I wondered what will power the new Galaxy S4 phones that Samsung has been aggressively marketing. You would think it would be a 28nm version… Read More


Circuit Analysis & Debugging

Circuit Analysis & Debugging
by Daniel Payne on 03-30-2013 at 3:18 pm

Spice Debugger

In EDA we often talk about how fast a SPICE circuit simulator is, or about capacity and accuracy compared to silicon measurements. Yes, speed, capacity and accuracy are important, however when talking to actual transistor-level circuit designers you discover something quite different, most of their time is spent doing debugging,… Read More


An Analog IC Router

An Analog IC Router
by Daniel Payne on 03-29-2013 at 8:10 pm

Earlier this week I wrote about a Goliath in EDA, Synopsys, and their new analog router, today it’s the David in EDA, Pulsic and their Unity Analog Router. I spoke with several people from Pulsic by phone:

  • Christopher Jost – San Jose
  • Dave Noble – San Jose
  • Fumiaki Sato – Tokyo, Japan
Read More