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Learning to Live with the Gaps Between Design and Verification

Learning to Live with the Gaps Between Design and Verification
by Tom Simon on 04-09-2020 at 6:00 am

Learning to live with the gaps between design and verification

Whenever I am asked to explain how chip design works by someone who is unfamiliar with the process, I struggle to explain the different steps in the flow. It also makes me aware of the discrete separations between each phase of activities. Of course, when you speak to a novice it is not even possible to get more than one layer down in the… Read More


A cautionary tale for the digital economy

A cautionary tale for the digital economy
by Terry Daly on 04-08-2020 at 10:00 am

TSMC Wafer

COVID-19 underscores the importance of US-based production for strategic industries

The COVID-19 pandemic has drawn intense focus on the need to repatriate pharmaceutical manufacturing back to the United States.  The increased awareness that a strategic adversary manufactures or controls up to 80% of the active pharmaceutical… Read More


Best Practices for IP Reuse

Best Practices for IP Reuse
by Bernard Murphy on 04-08-2020 at 6:00 am

Reuse

As someone who was heavily involved with rules for IP reuse for many years, I have a major sense of déja vu in writing again on the topic. But we (in SpyGlass) were primarily invested in atomic-level checks in RTL and gate-level designs. There’s a higher level of best practices in process we didn’t attempt to cover. ClioSoft just released… Read More


Lithography Resolution Limits: Paired Features

Lithography Resolution Limits: Paired Features
by Fred Chen on 04-07-2020 at 10:00 am

Lithography Resolution Limits Paired Features

As any semiconductor process advances to the next generation or “node”, a sticky point is how to achieve the required higher resolution. As noted in another article [1], multipatterning (the required use of repeated patterning steps for a particular feature) has been practiced already for many years, and many have… Read More


Synopsys is Changing the Game with Next Generation 64-Bit Embedded Processor IP

Synopsys is Changing the Game with Next Generation 64-Bit Embedded Processor IP
by Mike Gianfagna on 04-07-2020 at 6:00 am

ARC HS5x HS6x block diagram

Synopsys issued a press release this morning that has some important news – Synopsys Introduces New 64-bit ARC Processor IP Delivering Up to 3x Performance Increase for High-End Embedded Applications. At first glance, one could assume this is just an announcement for some new additions to the popular ARC processor family. While… Read More


Webinar on Detecting Security Vulnerabilities in SoCs

Webinar on Detecting Security Vulnerabilities in SoCs
by Tom Simon on 04-06-2020 at 10:00 am

Secure development Lifecycle for SOCs

As more security related capabilities are added in hardware it is changing the effort required to ensure that SoCs are not prone to attack. Hardware has the initial appeal of creating physical barriers to attack, yet it presents its own difficulties. For one thing, a flaw in a hardware security feature is much harder to fix in the … Read More


What’s New in CDC Analysis?

What’s New in CDC Analysis?
by Bernard Murphy on 04-06-2020 at 6:00 am

Validating assumptions in CDC constraints

Synopsys just released a white paper, a backgrounder on CDC. You’ve read enough of what I’ve written on this topic that I don’t need to re-tread that path. However, this is tech so there’s always something new to talk about. This time I’ll cover a Synopsys survey update on numbers of clock domains in designs, also an update on ways to… Read More


I Cancelled My Flight

I Cancelled My Flight
by Roger C. Lanctot on 04-05-2020 at 10:00 am

I Cancelled My Flight

Three weeks in to the current period of COVID-19 “social distancing” guidelines I have cancelled already-booked flights to Barcelona (cancellation of Mobile World Congress), Austin, Tex. (cancellation of SXSW), and London (cancelled company meeting). So it seemed logical that I’d cancel my flight to … Read More


UPDATE: Everybody Loves a Winner

UPDATE: Everybody Loves a Winner
by Mike Gianfagna on 04-05-2020 at 9:00 am

Picture1 4

Building a successful startup is hard, very hard. Creating a new category along the way is even more difficult. Those that succeed at both endeavors are quite rare. This is why an upcoming ESD Alliance event is a must-see in my view. The event is entitled “Jim Hogan and Methodics’ Simon Butler on Bootstrapping a Startup to ProfitabilityRead More


Can a Pandemic Stop the Apocalypse?

Can a Pandemic Stop the Apocalypse?
by Roger C. Lanctot on 04-04-2020 at 8:00 am

Can a Pandemic Stop the Apocalypse

The negative impacts of the coronavirus, COVID-19, on the automotive industry continue to radiate out from the closure of factories and dealerships (for vehicle sales, while service operations continue) to employee furloughs and plunging stock prices. At the same time, the global pandemic has begun to undermine the investment… Read More