SILVACO 051525 Webinar 800x100 v2

Scaling AI Infrastructure with Next-Gen Interconnects

Scaling AI Infrastructure with Next-Gen Interconnects
by Kalar Rajendiran on 04-29-2025 at 6:00 am

Data Centers Reimagined for Future of Gen AI

At the recent IPSoC Conference in Silicon Valley, Aparna Tarde gave a talk on the importance of Next-Gen Interconnects to scale AI infrastructure. Aparna is a Sr. Technical Product Manager at Synopsys. A synthesis of the salient points from her talk follows.

The rapid advancement of artificial intelligence (AI) is fundamentally… Read More


Siemens Describes its System-Level Prototyping and Planning Cockpit

Siemens Describes its System-Level Prototyping and Planning Cockpit
by Mike Gianfagna on 04-28-2025 at 10:00 am

Siemens Describes its System Level Prototyping and Planning Cockpit

We all know semiconductor design is getting harder. Much harder when you consider the demands of AI workloads and heterogeneous integration of many chiplets in a single package. This class of system demands co-optimization across the entire design flow. For example, functional verification, thermal analysis, signal and power… Read More


Recent AI Advances Underline Need to Futureproof Automotive AI

Recent AI Advances Underline Need to Futureproof Automotive AI
by Bernard Murphy on 04-28-2025 at 6:00 am

BEVDepth min

The world of AI algorithms continues to advance at a furious pace, and no industry is more dependent on those advances than automotive. While media and analysts continue to debate whether AI will deliver value in business applications, there is no question that it adds value to cars, in safety, some level of autonomous driving, … Read More


Podcast EP285: The Post-Quantum Cryptography Threat and Why Now is the Time to Prepare with Michele Sartori

Podcast EP285: The Post-Quantum Cryptography Threat and Why Now is the Time to Prepare with Michele Sartori
by Daniel Nenni on 04-25-2025 at 10:00 am

Dan is joined by Michele Sartori – senior product manager at PQShield. Michele is a software engineer in Computer and Network Security, specializing in product management. He is a passionate tech team leader at the forefront of emerging technologies focused on achieving tangible results.

In this highly informative discussion,… Read More


Cost-Effective and Scalable: A Smarter Choice for RISC-V Development

Cost-Effective and Scalable: A Smarter Choice for RISC-V Development
by Daniel Nenni on 04-25-2025 at 6:00 am

Vast library of 90+ Prototype Ready IP

The RISC-V ecosystem is witnessing remarkable growth, driven by increasing industry adoption and a thriving open-source community. As companies and developers seek customizable computing solutions, RISC-V has become a top choice. Providing a scalable and cost-effective ISA foundation, RISC-V enables high-performance… Read More


High-speed PCB Design Flow

High-speed PCB Design Flow
by Daniel Payne on 04-24-2025 at 10:00 am

PCB design phases min

High-speed PCB designs are complex, often requiring a team with design engineers, PCB designers and SI/PI engineers working together to produce a reliable product, delivered on time and within budget. Cadence has been offering PCB tools for many years, and they recently wrote a 10-page white paper on this topic, so I’ll share … Read More


ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA Tools

ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA Tools
by Bob Smith on 04-24-2025 at 6:00 am

CEO Outlook #2 (1)

Every spring, the ESD Alliance, a SEMI Technology Community, organizes a get together where industry executives and experts gather to network and talk about trends in the electronic design automation industry.

The theme of this year’s event, once again co-hosted by Keysight, is “How Multi-Physics is Reshaping Chip Design and… Read More


The Growing Importance of PVT Monitoring for Silicon Lifecycle Management

The Growing Importance of PVT Monitoring for Silicon Lifecycle Management
by Kalar Rajendiran on 04-24-2025 at 6:00 am

SLM IP Target Applications

In an era defined by complex chip architectures, ever-shrinking technology nodes and very demanding applications, Silicon Lifecycle Management (SLM) has become a foundational strategy for optimizing performance, reliability, and efficiency across the lifespan of a semiconductor device. Central to effective SLM are Process,… Read More


TSMC Brings Packaging Center Stage with Silicon

TSMC Brings Packaging Center Stage with Silicon
by Mike Gianfagna on 04-23-2025 at 11:45 am

TSMC Brings Packaging Center Stage with Silicon

The worldwide TSMC 2025 Technology Symposium recently kicked off with the first event in Santa Clara, California. These events typically focus on TSMC’s process technology and vast ecosystem. These items were certainly a focus for this year’s event as well. But there is now an additional item that shares the spotlight – packaging… Read More


TSMC 2025 Technical Symposium Briefing

TSMC 2025 Technical Symposium Briefing
by Daniel Nenni on 04-23-2025 at 11:40 am

TSMC Advanced Tecnology RoadMap 2025 SemiWiki

At the pre-conference briefing, Dr. Kevin Zhang gave quite a few of us media types an overview of what will be highlighted at the 2025 TSMC Technical Symposium here in Silicon Valley. Since most of the semiconductor media are not local this was a very nice thing to do. I will be at the conference and will write more tomorrow after the … Read More