In 25 years of working in economic development, Eric gained a lot of experience and knowledge in the field of Foreign Direct Investments (FDI), internationalisation of SME’s, innovation cooperation and economic development. I have built a strong network in the Netherlands and abroad towards business, government, knowledge… Read More
A Webinar About Electrical Verification – The Invisible Bottleneck in IC DesignElectrical rule checking (ERC) is a standard part…Read More
Signal Integrity Verification Using SPICE and IBIS-AMIHigh-speed signals enable electronic systems by using memory…Read More
imec on the Benefits of ASICs and How to Seize ThemIn an era where product differentiation increasingly depends…Read More
MZ Technologies Launches Advanced Packaging Design Video SeriesIn a significant move aimed at empowering semiconductor…Read MorePodcast EP322: A Wide-Ranging and Colorful Conversation with Mahesh Tirupattur
Daniel is joined by Mahesh Tirupattur, chief executive officer at Analog Bits. Mahesh leads strategic planning to develop and implement Analog Bits’ vision and mission of enabling the silicon digital world with interfacing IP to the analog world. Additionally, Mahesh oversees all aspects of Analog Bits’ operations to ensure… Read More
MZ Technologies Launches Advanced Packaging Design Video Series
In a significant move aimed at empowering semiconductor and systems-design engineers, MZ Technologies has announced the launch of a new video series focused on advanced packaging design. This initiative comes at a time when the semiconductor industry is rapidly shifting toward multi-die, 2.5D/3D integration, heterogeneous… Read More
Superhuman AI for Design Verification, Delivered at Scale
There is a new breed of EDA emerging. Until recently, EDA tools were focused on building better chips, faster and with superior quality of results. Part of that process is verifying and debugging the resultant design. Thanks to ubiquitous AI workloads and multi-chip architectures, the data to be verified and debugged is exploding,… Read More
The Quantum Threat: Why Industrial Control Systems Must Be Ready and How PQShield Is Leading the Defense
Industrial control systems (ICS) underpin the world’s most critical infrastructure: power grids, manufacturing plants, transportation networks, water systems, oil and gas facilities, and chemical processing operations. For decades, these systems relied on isolation, proprietary communication protocols, and hardware… Read More
AI Deployment Trends Outside Electronic Design
In a field as white-hot as AI it can be difficult to separate cheerleading from reality. I am as enthusiastic as others about the potential but not the “AI everywhere in everything” message that some emphasize. So it was interesting to find a survey which looks at the deployment reality outside our narrow domain of electronic and … Read More
CAST’s Breakthrough in Automotive IP: The MSC-CTRL Microsecond Channel Controller
In a significant advancement for automotive electronics, Semiconductor intellectual property provider CAST has unveiled the MSC-CTRL Microsecond Channel Controller IP core. This new core empowers ASIC and FPGA designers with a deterministic, microsecond-precise serial interface for connecting to smart power and sensor… Read More
Radio Frequency Integrated Circuits (RFICs) Generated by AI Based Design Automation
By Jason Liu, RFIC-GPT Inc.
Radio frequency integrated circuits (RFICs) have become increasingly critical in modern electronic systems, driven by the rapid growth of wireless communication technologies (5G/6G), the Internet of Things (IoT), and advanced radar systems. With the desire for lower power consumption, higher… Read More
Ceva-XC21 Crowned “Best IP/Processor of the Year”
In a resounding affirmation of innovation in semiconductor intellectual property (IP), Ceva, Inc. (NASDAQ: CEVA) has been honored with the prestigious “Best IP/Processor of the Year” award at the 2025 EE Awards Asia, held in Taipei on December 4. The accolade went to the Ceva-XC21, a groundbreaking vector digital… Read More
Propelling DFT to New Levels of Coverage
Siemens recently released a white paper on a methodology to enhance test coverage for designs with tight DPPM requirements. I confess when I first skimmed the paper, I thought this was another spin on fault simulation for ASIL A-D qualification, but I was corrected and now agree that while there are some conceptual similarities… Read More


Quantum Computing Technologies and Challenges