Free and Open Chip Design Tools: Opportunities, Challenges, and OutlookDesigning semiconductor chips has traditionally been costly and…Read More
WEBINAR: Functional ECO Solution for Mixed-Signal ASIC DesignThis webinar, in partnership with Easy-Logic Technology, is…Read More
Taming Concurrency: A New Era of Debugging Multithreaded CodeAs modern computing systems evolve toward greater parallelism,…Read More
This Diakopto paper discusses for the first time, a new effect – a false electrical mismatch in post-layout simulations for perfectly symmetric nets. This effect is caused by the difference in distributions of parasitic coupling capacitors over the nodes of parasitic resistor networks, even for symmetric nets. This, in turn,… Read More
The hand-wringing over Elon Musk’s takeover of Twitter began in earnest, Friday, as General Motors announced it would suspend advertising on the platform. Ford Motor Company, too, said it would take a step back.
The news of Musk’s completion of his Twitter acquisition completely eclipsed Mobileye’s hugely successful… Read More
Dan is joined by Barry Paterson, CEO of Agile Analog. Barry has held senior leadership, engineering and product management roles at Wolfson Microelectronics and Dialog Semiconductor. He has been involved in the development of custom mixed-signal silicon solutions for many of the leading mobile and consumer electronics … Read More
As more AI applications turn to edge computing to reduce latencies, the need for more computational performance at the edge continues to increase. However, commodity compute engines don’t have enough compute power or are too power-hungry to meet the needs of edge systems. Thus, when designing AI accelerators for the edge, Joe… Read More
SemiWiki recently posted a blog on “Deep Data Analytics for Accelerating SoC Product Development.” That blog focused on proteanTecs’ AI-enabled chip analytics platform that helps accelerate SoC product development. The blog provided insight into proteanTecs’ approach and shared quantifiable business-impact metrics … Read More
Area selective processing (ASP) is assuming ever greater importance in semiconductor fabrication. ASP involves deposition and removal of materials at the molecular level¾10 nm or less. Key applications of ASP include self-aligned contacts and fully self-aligned vias (FSAVs), scaling boosters that are essential to continue… Read More
Dan is joined by Sagar Pushpala, a seasoned semiconductor professional with more than 35 years of experience with IDMs, fabless and related semiconductor entities. He is actively involved with nearly a dozen companies in the US, Singapore and India in advisory/board, consulting and investment roles.
Dan explores the dynamics… Read More
In wearables and hearables, low power is king. Earbuds for example still only manage a half-day active use before we need to recharge. Half a day falls short of truly convenient for most of us – a full day would be much better, allowing for overnight recharge. Physics limits battery sizes so system designers must look to SoC architectures… Read More
Performance, Power and Area (PPA) are the commonly touted metrics in the semiconductor industry placing PPA among the most widely used acronyms relating to chip development. And rightly so as these three metrics greatly impact all electronic products that are developed. The degree of impact depends of course on the specific … Read More
My IC design career started just a few years before PADS got started in 1985 with a DOS-based tool for PCB design. A lot has changed since then, as PADS was acquired by Mentor Graphics in 2001, and continued to grow under Siemens EDA, now with four versions to choose from, where the top version is called PADS Professional Premium:
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Intel’s Pearl Harbor Moment