AI-Driven Automation in Semiconductor Design: The Fuse EDA AI AgentThe semiconductor industry is experiencing unprecedented growth in…Read More
TSMC Technology Symposium 2026: Advancing the Future of Semiconductor InnovationOne of my favorite times of the year…Read More
Synopsys Explores AI/ML Impact on Mask Synthesis at SPIE 2026The SPIE Advanced Lithography + Patterning Symposium recently…Read More
Unraveling Dose Reduction in Metal Oxide Resists via Post-Exposure Bake EnvironmentIn the realm of extreme ultraviolet (EUV) lithography,…Read More
In February of 2026, Taiwan Semiconductor Manufacturing Company (TSMC) will host the TSMC AZ Exclusive Experience Day in Phoenix, Arizona, offering selected participants a rare opportunity to engage directly with one of the most advanced semiconductor manufacturing organizations in the world. The event will serve as an immersive… Read More
The Design Automation Chips to Systems Conference is the preeminent international event for professionals involved in electronic design, system architecture, and EDA. Formerly known simply as the Design Automation Conference or DAC has evolved over more than six decades into a forward-looking forum that spans the entire… Read More
Naama BAK is an entrepreneur with 15 years of experience in tech. He is the founder of Understand Tech, a generative AI platform for enterprises, and Trustii.io, a machine learning platform for data science challenges. He previously held roles at NXP Semiconductors, Orange, and Safran, working in cybersecurity across research,… Read More
Echo Yang is the CEO of CSCERAMIC, a China-based manufacturer specializing in advanced ceramic materials and precision ceramic components for industrial and laboratory applications. With a background spanning international trade, manufacturing coordination, and engineering-driven supply chain development, Echo leads… Read More
Daniel is joined by Mark Kuemerle, Vice President of Technology, Custom Cloud Solutions at Marvell. Mark is responsible for defining leading-edge ASIC offerings and architects system-level solutions. Before joining Marvell, Mark was a Fellow in Integrated Systems Architecture at GLOBALFOUNDRIES and has held multiple engineering… Read More
Clock jitter rarely fails in obvious ways. In advanced-node designs, its impact is often indirect, emerging through subtle timing uncertainty, interaction with power delivery noise, and compounding effects across large clock networks. These behaviors can quietly erode margin and predictability, even when conventional… Read More
Synopsys and AMD were recently selected by the World Economic Forum for inclusion in the WEF’s MINDS (Meaningful, Intelligent, Novel, Deployable Solutions) AI program, recognizing their leadership and real-world impact in applying generative and agentic AI to semiconductor design and engineering. This distinction places… Read More
When Morris Chang left Texas Instruments in 1983 to found TSMC, he was not merely starting a new company—he was proposing a new industrial logic. Chang recognized that semiconductor manufacturing had become so capital-intensive that it could no longer survive as just one function inside a vertically integrated company.… Read More
We have been working with Matt and Samantec for the past 5 years. Samtec is a billion dollar privately-held manufacturer with a wide range of electronic interconnect products that are critical in high-speed and high-reliability systems.
Matt has been with Samtec for more than 10 very important year developing go-to-market strategies… Read More
As usual in January we start with a look back at the papers we reviewed last year. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas. As always, feedback welcome.
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Why Your LLM-Generated Testbench Compiles But Doesn’t Verify: The Verification Gap Problem