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Physical Implementation Engineer

Physical Implementation Engineer
by Admin on 07-20-2020 at 12:45 pm

Website Dolphin Design


To support the growth of its ASIC / SoC design activity and meet the ever-increasing challenges of its customers regarding the density, consumption and operating frequency of their integrated circuits, we are looking for a Physical Implementation Engineer.


  • Support a complete circuit by improving the physical implementation flow (RTL to GDSII) :
    • Topographic synthesis
    • Writing of low power architecture files (UPF)
    • Floorplan, Placement-Routing, Synthesis of clock trees, Performance optimization (surface, delays, consumption)
    • Physical implementation (RTL2GDSII)
  • Static Timing Analysis (STA)
    • Post-layout verification (STA, formal proof, DRC, LVS, IR Drop …)
    • Development of timing constraints
  •  Develop and improve the design flow
    • Maintenance of EDA tools
    • Flow automation (TCL, Bash)


Engineer training or Bac + 5 in microelectronics, you justify a minimum of 5 years experience in Placement-Routing and / or in post-layout validation (STA, DRC, LVS) STA or in support of EDA tools for physical implementation (RTL2GDSII)

Required Skills :

  • Knowledge of PnR design tools (Innovus, ICC2, Nitro-SoS) and Signoff verification (Prime Time, Caliber, RedHawk …
  • Programming skills required
  • Fluent English
  • Topographic synthesis with adjustment of the constraints would be a plus

This position requires autonomy, rigor, methodology and teamwork, with ease of communication to evolve in a multifunctional group (digital, layout, measures …) and multicultural.


In an environment with high technical content, you will be able to develop your skills and evolve, according to your wishes, towards increased technical responsibilities, towards project management or technical supervision.

Apply for job

To view the job application please visit www.dolphin-design.fr.