Digital IC Designer

Description

1.Design and Process Technology Co-Optimization (DTCO) for tsmc’s advanced technology node to achieve best PPAC

2.TSMC Process Technology Benchmark and Impact Analysis

3.Design and Process PPA Knobs Exploration for advanced technology node and technology Path-finding .

Qualifications

1.Require Master or Ph.D. degree in EE or CS related fields .

2.Experiences in standard cell design and layout optimization, physical design flow, or design flow automation are preferred.

3.Nice to have experiences in spice simulation, layout modification or automation, cell library characterization, synthesis or P&R/IREM/STA signoff tools.

4.Programming skills or script development experience in Python, Perl, Tcl, Csh,C/C++ are preferred.

5.Good communication skill and team work attitude is a must.

6. Languages: English, Chinese

7. Key Experience: Standard cell design,Physical design flow,P&R/IREM/STA,Design Flow automation

8. Personal Attributes: Creative, spontaneous, and willingness to take challenging tasks