Meet Quadric on the Road: Three Must-Attend AI Events

This late summer, Quadric is taking its vision for programmable, on-device AI to three of the industry’s most influential gatherings. From advanced processor design at HotChips to scalable deployment at the AI Infra Summit and physical AI at Embedded World North America, each stop offers a different opportunity to see how the Chimera™ general-purpose neural processing unit (GPNPU) is reshaping AI silicon.

The tour begins at HotChips 2026, August 23–25 at Stanford University in Stanford, California. Quadric is sponsoring the event and will be available in the expo area. For chip architects, SoC developers, engineering leaders, and curious candidates, this is an ideal setting to discuss the architectural choices behind Chimera GPNPU cores and the practical demands of bringing new AI workloads into production. Visitors can learn how Quadric combines neural-network acceleration with programmable scalar, vector, and matrix processing in one unified architecture—and explore career opportunities with the team building it.

Next, Quadric heads to the AI Infra Summit, September 15–17 at the Santa Clara Convention Center. Visit Booth 746 to meet the team and discuss the increasingly important shift from cloud-only AI toward efficient inference on devices. The centerpiece of Quadric’s participation is CTO and cofounder Nigel Drego’s presentation, “Take Control: A Processor Designed for On-Device AI,” on September 16 from 3:00 to 3:20 p.m.

The session arrives at a critical moment. Models are advancing faster than conventional fixed-function accelerators can comfortably accommodate, while product teams need performance, power efficiency, and adaptability without redesigning silicon whenever operators or architectures change. Quadric’s approach gives developers a fully programmable processor and software toolchain that can handle complete inference graphs alongside the supporting DSP and control code. New operators and custom kernels can be implemented in software, helping silicon platforms remain useful as workloads evolve.

Quadric’s third stop is Embedded World North America on September 24 at the Anaheim Convention Center in Anaheim, California. At 10:25 a.m., Software Architect Mike Leonard will present “Porting Vision-Language-Action Models to Embedded NPUs: Architectural Requirements and Optimization Techniques” as part of the Embedded Model Deployment technical track.

This talk is especially relevant to teams developing robotics, autonomous machines, automotive systems, and other physical AI products. Vision-language-action models must connect perception and language reasoning with responsive control, often under strict limits on latency, memory, bandwidth, and power. Leonard will share practical guidance for moving these demanding models onto embedded NPUs and optimizing their deployment. Attendees can expect a focused look at the architectural requirements, tradeoffs, and techniques that matter when state-of-the-art AI must operate beyond the data center.

Across all three events, the common theme is control: control over model deployment, over application pipelines, and over the useful life of an SoC. Unlike fixed-function NPUs that may require workloads to be partitioned across accelerator, CPU, and DSP resources, Chimera is designed to merge AI graph execution and conventional C++ processing into a single code stream. The Chimera SDK supports importing trained ONNX models, quantizing, compiling, simulating, validating, and profiling them before hardware is required. That unified experience can simplify integration while giving developers room to adapt after deployment.

Whether your priority is processor architecture, AI infrastructure, embedded model deployment, or your next engineering role, there is a Quadric stop for you. Join the team at Stanford, Santa Clara, or Anaheim to ask detailed questions, compare approaches, and see why programmability is becoming essential to the future of AI computing.

Book time with Quadric’s experts in advance or simply stop by during expo hours. Bring your toughest questions about model compatibility, performance scaling, software portability, safety, and power budgets—and leave with clearer paths forward today.

Bottom line: Mark your calendar: HotChips, August 23–25; AI Infra Summit, September 15–17, Booth 746; and Embedded World North America, September 24. Come meet Quadric and discover how a unified GPNPU can help turn ambitious on-device AI models into efficient, adaptable products.

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