The Accidental Infrastructure: How Crypto Miners Built the Foundation of the AI Boom

The Accidental Infrastructure: How Crypto Miners Built the Foundation of the AI Boom
by Jonah McLeod on 07-06-2026 at 2:00 pm

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Most crypto forty-niners died broke in a warehouse full of their computing rigs. Former Ethereum miner CoreWeave took its gold to Wall Street. On June 22, 2026, it joined the Nasdaq-100 — fifteen months after its IPO, nine years after its founders assembled their first GPU rig in a New Jersey office.

The people who built the physical… Read More


Webinar: How to burst your workload to Google Cloud, without leaving your data stranded

Webinar: How to burst your workload to Google Cloud, without leaving your data stranded
by Admin on 06-29-2026 at 9:25 pm

Google Cloud offers powerful compute, networking and GPU/TPUs to run your workloads. But how to feed the beast? EDA workloads require a lot of data and scalable storage plays is that data hub which keeps your workloads going. Google worked with NetApp – a premier on-premises choice for EDA shared storage – to build … Read More


GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneck

GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneck
by Admin on 06-16-2026 at 10:00 am

fig1 gpu opc challenge

As semiconductor manufacturing pushes toward advanced nodes with tighter feature sizes, the optical proximity correction (OPC) workflow is adopting curvilinear masks to achieve the larger process windows that traditional Manhattan geometries cannot deliver.

Traditional Manhattan masks constrain shapes to vertical … Read More


A tower-like heterogeneous packaging architecture for the AI era

A tower-like heterogeneous packaging architecture for the AI era
by Moh Kolb on 06-16-2026 at 6:00 am

Picture1 VTEMC

For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More


WAVE-N Specialized Video Processing NPU for Edge AI Systems

WAVE-N Specialized Video Processing NPU for Edge AI Systems
by Daniel Nenni on 04-29-2026 at 6:00 am

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The rapid growth of AI applications in edge devices has created a strong demand for specialized hardware capable of performing high-performance neural network inference under strict power and latency constraints. Traditional CPUs and GPUs often struggle to meet the efficiency requirements of embedded and mobile systems.… Read More


Architecting Intelligence: The Rise of RISC-V CPUs in Agentic AI Infrastructure

Architecting Intelligence: The Rise of RISC-V CPUs in Agentic AI Infrastructure
by Daniel Nenni on 04-09-2026 at 6:00 am

The rise of RISC V CPUs SiFive

SiFive’s newly announced $400 million Series G financing represents a significant technical inflection point for high-performance RISC-V CPU development targeted at agentic AI data center workloads. The funding, which values the company at $3.65 billion, is specifically intended to accelerate next-generation CPU IP, … Read More


SiFive’s AI’s Next Chapter: RISC-V and Custom Silicon

SiFive’s AI’s Next Chapter: RISC-V and Custom Silicon
by Daniel Nenni on 02-18-2026 at 2:00 pm

AI’s Next Chapter RISC V and Custom Silicon

In the rapidly evolving world of artificial intelligence and semiconductor design, open-standard processor architectures are gaining unprecedented traction. At the center of this shift is SiFive, a company founded by the original creators of the RISC-V ISA, which champions an open, extensible, and license-free alternative… Read More


Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon

Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon
by Daniel Nenni on 11-27-2025 at 8:00 am

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The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More


Semidynamics: A Single-Software-Stack, Configurable and Customizable RISC-V Solution

Semidynamics: A Single-Software-Stack, Configurable and Customizable RISC-V Solution
by Kalar Rajendiran on 11-07-2024 at 6:00 am

Risc V CPU

Founded with a vision to create transformative, customizable IP solutions, Semidynamics has emerged as a significant player in the AI hardware industry. Initially operating as a design engineering company, Semidynamics spent its early years exploring various pathways before pivoting to develop proprietary intellectual… Read More