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This webinar will benefit engineers, designers, operators, and analysts working in technologies such as 5G/6G, autonomous vehicle control, AR/VR applications, eVTOL, emergency communications, smart factory operation, smart cities, and large IoT systems. Time: 22 September, 2022 14:00 CEST / 8 AM EDT / 1 PM BST / 5:30 PM IST About this Webinar NEDGE systems enable …
The next scientific hub for space exploration might just be located on the Moon. As NASA partners around the world set their sights on sending humans to the lunar surface, …
At Altair, your success is our #1 priority, and we’re here to help you get more out of your Altair Simulation Driven Design solutions. Ask the Expert is a virtual drop-in webinar allowing you to learn about industry applications, tips & tricks and submit questions or speak LIVE with our Altair Simulation Driven Design experts. …
48th International Symposium for Testing and Failure Analysis The demand for higher performance and lower power-consumption microelectronic devices has driven semiconductor technology to shrink continuously according to Moore’s Law. Furthermore, for latest technologies in nano realm, a new set of disruptive development in new structures and novel materials was introduced. Thus, defects causing semiconductor device …
This webinar outlines the power integrity, thermal integrity, and signal integrity difficulties in 3D-IC design. TIME: NOVEMBER 3, 2022 11 AM EDT / 3 PM GMT / 8:30 PM IST REGISTER HERE About this Webinar This webinar introduces the Multiphysics requirements to meet performance, integrity, and reliability expectations for 3DICs. Beyond ‘golden solver’ requirements for …
Boost Simulation Productivity with SimSolid Enhance Your Product Development Process with Rapid Design Point Analysis By performing structural analyses on fully featured CAD assemblies within minutes, SimSolid is the game-changing simulation technology for designers, engineers, and analysts. It eliminates geometry preparation and meshing: the two most time-consuming, expertise-intensive, and error-prone tasks performed in a conventional …
Date: Tuesday, January 24, 2023 Time: 09:00 GMT / 10:00 CET / 11:00 EET & Israel / 14:30 IST Join us for this one-hour CadenceTECHTALK to learn how the Cadence Celsius Thermal Solver uses design data such as layout geometries, material properties, and dissipated power simulation results from Microwave Office software to provide designers with …
Date: Thursday, January 26, 2023 Time: 09:00 GMT / 10:00 CET / 11:00 EET & Israel / 14:30 IST Static Timing Analysis (STA) aims to validate the timing performance of a synchronous design. While it is a well-known concept in modern digital implementation flows, for engineers who are not familiar with STA or others who …
*Company email required for registration* Register Transfer Level (RTL) power analysis, performed early in the design cycle, is a key component of end-to-end methodology to maximize energy efficiency. Such analysis has become a critical requirement for many IC designs today and in the future. Although RTL power analysis technology has been available to designers for …
TIME: FEBRUARY 16, 2023 11 AM EST / 3 PM GMT / 8:30 PM IST About this Webinar This 2023 R1 webinar provides insights on the latest Ansys Safety Analysis new features that further extend and complete the efficient, holistic application of safety, reliability, and cybersecurity analysis methods in a high-performance manner. Discover more about …
This webinar cover the modeling abstraction in the design of electronics, semiconductors and software. This webinar will definitely improve your modeling skills! –Is the abstraction right for your application and design goal? –How do you accelerate the simulation using abstraction? –Can you change the model of computation using abstraction to simplify the modeling effort? During …
Performance Testing and Analysis Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die. Agenda (BST) 12:00 Welcome and Introduction – Mike Bartley, Tessolve 12:00 Nick Heaton, Cadence Design Systems - SoC Verification in a Multi-chip, Multi-die world 12:30 David Kelf, Breker Verification Systems - Automated SoC Performance and …
IC package design teams and characterization teams have had a “throw-it-over-the-wall” relationship for decades, which often delays design releases by months. However, as signal integrity (SI) and power integrity (PI) challenges evolve with multi-die heterogeneous integration, the need to perform SI/PI analysis as part of the design flow has become a requirement to meet compressed …
