Practical Ports for Perfect Performance: HFSS Ports for High-Performance Interconnect Solutions

This webinar spotlights the theoretical basis of various port types and how to use them in real designs to deliver maximum accuracy. Time: May 13, 2021 11 AM EDT / 4 PM BST Venue: Online About this Webinar To optimize an entire signal path when designing high-performance interconnect solutions, it's important to understand ports and how to best …

CASPA Virtual Job Fair

• Place: Online ZOOM meeting (Registration, please click here!) Job Fair Zoom link:  https://zoom.us/j/93449211358 • Date: Saturday May 15th, 2021 • Time: 1:30 PM – 5:10 PM • Company Check-in Time: 12:30 PM -- 1:30 PM • Sequential Company Introduction: 1:30 PM – 3:00 PM 1:30PM – 1:45PM CASPA Chairman opening introduction. 1:45PM – 3:00PM Each company has 5-minute introduction …

Tech Innovation Forum

Focusing on life beyond the healthcare crisis and examining the technology innovations that occurred from the year that changed everything. Tech Innovation Forum 2021 will focus on the acceleration of innovation as a result of COVID-19. The Forum will focus on topics such as the Future of Work, Future of Entertainment/Gaming, the Innovation Economy and …

Improve your Debug Productivity

With today’s more complex designs, we tend to see a growing productivity gap between design and verification, so we need to maximize the reusability of your verification environment, improve the automation, raise the level of abstraction… but we need higher performance, context-aware debug supporting the complete logic verification flow During this session, we will cover …

Trouble: Three CDC Glitches That Only a Netlist Will See

Overview: As the industry increases investments in automotive and safety-critical design, there is a renewed focus on design reliability. Glitches on clock-domain-crossing (CDC) signals reduce reliability and lead to potential silicon failures. An increasing number of companies deploy CDC verification at both the RTL and the gate-level. To identify potential glitches on CDC paths at …

Novel Metrics Visualisation for Quick Design Analysis

Overview Creating a final design is a sequence of operations from register-transfer-level (RTL) synthesis, through implementation to signoff. Each of these operations is further split into different steps, such as placement, clock tree synthesis, and routing. When run as part of a typical design flow, these steps generate a vast quantity of valuable data, which …

IP Security: Protecting Your Most Important IP Assets With Methodics IPLM

Live Webinar, May 19 Protecting IP is a challenge. Many companies are constantly dealing with leaky IP portfolios, either due to nefarious action or just accidental behavior. The complexity of design, with IP being made up of large nested hierarchies of other designers, makes tracking IP that much more difficult. Today we have the challenge …

Simulating Electric Locomotive Passive Safety System Operation

In this webinar, Ural Locomotives will explain how a railway rolling stock’s passive safety system is designed to improve the safety of passenger transportation, reduce the risk of fatalities and injuries and minimize the damage to rolling stock in extreme situations resulting from accidental collisions of rolling stock with obstacles. Time: May 19, 2021 10 …

Ansys Digital Twin Solutions for Electrification and Electric Drives

Learn about Ansys Digital Twin Solutions for electric drive systems, which range from multiphysics libraries to high-fidelity simulations using reduced-order models (ROMs). This webinar also covers industrial application examples for electric drive systems. Time: May 19, 2021 11 AM EDT / 4 PM BST / 8:30 PM IST Venue: Online About this Webinar Simulation has …

What’s the Recipe for Efficient Analog IC Design and Verification?

Overview For analog IC designers, the most important capability is rapid simulation of an accurate model of their circuits. Early in the design process, they explore architectures and novel approaches and need an agile simulation flow that gives them confidence that the implemented design is capable of meeting the system specs. As the design matures, …