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Advanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and many more. However, more aggressive time-to-market and higher performance requirements force IC designers to look for advanced and seamless design flows, tools & methodologies to …
Thursday, May 12, 2022 | 10:00 - 11:00 a.m. Pacific During complex IP development, effort and time taken to perform a functional ECO is very high. It involves analysis and understanding of huge combinational and sequential blocks, and usually runs into multiple iterations if done manually. For example: the physical netlist multibit register mapping could …
Join us as one of our top engineers talks about interfacing DDR with programmable logic on the AMD - Xilinx Versal NoC. The webinar will include a live demo and Q&A session. This session will be 30 minutes. BLT (Bottom Line Technologies) is an engineering company that provides custom electronic solutions for commercial and …
Join us as one of our top engineers talks about interfacing DDR with programmable logic on the AMD – Xilinx Versal NoC. The webinar will include a live demo and Q&A session. This session will be 30 minutes. BLT (Bottom Line Technologies) is an engineering company that provides custom electronic solutions for commercial and …
This online workshop covers common gotchas and roadblocks engineers face when implementing FPGA designs and bringing up PCBs for the first time. Learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Xilinx® Vivado® Design Suite, including techniques for triggering on boot and hardware-software co-debugging. Special topics …
This 4-hour online workshop by BLT Training provides engineers with experience using the Vitis™ Model Composer tool for MATLAB Simulink model-based designs, specifically focusing on the Versal AI Engines. Learn how to create a model-based design, and create, simulate and debug a complex system with the AIE library blocks. The workshop includes live demos.
Need to accelerate your designs or project schedules? Join 3 of BLT's expert engineers as they discuss some of their valuable productivity tricks they use while designing with Xilinx devices. This will be a live roundtable discussion. Our panel of experts will also be answering audience questions during the roundtable. REGISTER: https://us02web.zoom.us/webinar/register/1216650824875/WN_2V2VlXXxQ9y5wUhK48RVgg
Join 2 panelists from the AMD Xilinx Factory and our expert, Glenn, to explore the new IDE. This webinar will discuss the latest updates to Vitis in the new release 2023.1.
WEBINAR: Introduction to AXI: What Is AXI? November 1, 2023 @ 2 PM ET REGISTER: https://us02web.zoom.us/webinar/register/7816980763194/WN_jUi6lu7aRr2CSouNekp_Dw DESCRIPTION: Learn about the AXI handshake, what is a transaction, and how beats make a burst. This webinar includes demos and Q&A. Presented by BLT, AMD Authorized Training Provider and Premier Partner. www.bltinc.com. Visit our website to see additional …
Mastering Vivado Timing Constraints: Strategies for FPGA Performance Workshop (Sponsored by AMD Xilinx) Description Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover how to make use of the features provided by Vivado, clock domain crossing strategies, and how to get the …
Demystifying Clock Domain Crossings (CDC) and Synchronization Circuits Webinar Description This one-hour webinar will discuss all of the basics of what clock domain crossings (CDCs) are and how you can navigate them safely. We will discuss how to do single bit CDCs, several methods for CDC busses, and also the Xilinx Parameterized Macros (XPM) for …
Versal Adaptive SoCs 101: Quick Start Guide to Integration and Implementation Workshop BLT Engineers have successfully deployed designs to Versal devices for Clients. Learn from the experts. This 4-hour online workshop explores the AMD Versal adaptive SoC heterogeneous architecture containing a programmable network on chip (NoC) and AI Engines and learn how to use different …
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Powering AI with Silicon and Embedded Leadership at TSMC 2024 Technology Symposium ACL Digital, an ALTEN group company, is excited to showcase its advanced semiconductor and embedded systems expertise at the upcoming TSMC 2024 NA Technology Symposium in Santa Clara, Booth #215, and participate in the Austin Technology Workshop, Boston Technology Workshop, and Europe Technology Workshops. …
REGISTER: https://us02web.zoom.us/webinar/register/5517125835521/WN_ZCmAh5TcRYeo7EWd4sM6vA AMD Versal AI Engine Tool Flow Explained: Enhancing Your Development Journey In this webinar, learn how to get started programming the Versal AI Engines using the Vitis IDE. This session provides a thorough introduction to the Vitis IDE for AIE development, and how to use the AI Engine Simulators to quickly develop and …
