
- This event has passed.
WEBINAR: Interfacing DDR with Programmable Logic on the Xilinx Versal NoC
May 20, 2022 @ 2:00 PM - 2:30 PM
FreeJoin us as one of our top engineers talks about interfacing DDR with programmable logic on the AMD – Xilinx Versal NoC. The webinar will include a live demo and Q&A session.
This session will be 30 minutes.
BLT (Bottom Line Technologies) is an engineering company that provides custom electronic solutions for commercial and GOV/IC/AERO applications. We have been designing FPGAs / SoCs and custom chips, embedded software, circuit boards and complete systems for over 30 years. BLT is also a Xilinx Authorized Training Provider.
Share this post via:
Micron Mandarin Memory Machinations- CHIPS Act semiconductor equipment hypocrisy