Siemens EDA will be returning to DAC this year as a Platinum Sponsor.

The 38th Design Automation Conference is next week and this one is for the record books. Having been virtual the last two years, next week we will meet live once again. I think we may have all taken for granted the value of live events but now we know how important they are on both a professional and human level, absolutely.

“The Design Automation Conference (DAC) is recognized as the premier conference for design and automation of electronic systems.  DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors.”

“We would like to extend a big thank you to the DAC organizers under the leadership of Siemens EDA’s own Harry Foster, the General Chair of this year’s Design Automation Conference, in organizing a wonderful conference program under challenging circumstances. Kudos, Harry and the DAC program team!” – Siemens EDA Management

Siemens EDA in the Conference Program

You’ll find Siemens EDA experts featured throughout the conference program – delivering five conference papers and four DAC Pavilion presentations, hosting a tutorial and designer track panel, and presenting 11 posters during the Poster Networking Reception. We’ve highlighted some must-see events below, but you can view their full list of conference activities here.

DAC Pavilion Session: Digitalization—the return to outsize growth for the semiconductor industry

10:15am – 11:15am PST | Monday, Dec. 6th

Joe Sawicki, Executive VP of Siemens EDA

In just one short year, a decade of digitalization occurred across all industries fueled by innovation in the semiconductor industry. Dramatic growth occurred in use of the cloud, work from anywhere and telemedicine, while online collaborative tool usage increased a staggering 4000%.

Impressive as this all is, it is just the beginning of a massive reinvigoration of the semiconductor industry. Emerging new compute and telecom infrastructures, with IoT starting to deliver its long-promised value, coupled with new technologies such as artificial intelligence are reshaping the competitive landscape at break-neck speed. Despite valid concerns over trade wars, there is no doubt the semiconductor market is once again on a dramatic growth trajectory.

Designer Track Panel: UVM: Where the Wild Things Are

10:30am – 12:00pm PST | Wednesday, Dec. 8^th

Moderator: Dennis Brophy, Siemens EDA

Experts from Cerebras, Marvell Semiconductor, NVIDIA, Paradigm Works, and Synopsys will focus on specific enhancements being planned or considered to be added for the next revision of UVM IEEE 1800.2. Panelists have strong backgrounds in UVM development as current or past members of the UVM-WG in Accellera and/or IEEE and equally strong opinions on what is needed to keep UVM growing and relevant for functional verification.

Tutorial: Design and Consumption of IPs for Fail: Safe Automotive ICs

1:30pm – 5:00pm PST | Monday, Dec. 6^th

This tutorial featuring experts from Siemens EDA, NXP Semiconductors, and Arm Ltd. will focus on both the creation and consumption of automotive IP, looking at the various technologies and methodologies that can be used to standardize and automate this process.

Must-See Conference Paper Presentations:

Input Qualification Methodology Helps Achieve System Level Power Numbers 8x Faster

An automated Input Qualification Methodology is proposed that performs various Data Integrity Checks at design build and prototype stage and ensures in quicker iterations that input data is high fidelity leading to a well correlated power numbers. If multiple retries are needed, checkpoint database method is implemented to bypass the clean stages of the tool run.

Various checks pertaining to activity annotation (FSDB/SAIF/STW/QWAVE), technology libraries (.lib) and parasitic (SPEF) mapping are already part of the tool. Defining an input qualification methodology around these checks can save up to 88% of project time in achieving reliable power numbers.

What can chip design learn from the software world?

Many industries are undergoing a major transformation in the last years, but it seems the chip design practice is still basically where it was decades ago, with relatively minor improvements since. On the other hand, new bigger projects enabled by the on-going Moore’s law race, pose increasingly harder design & verification challenges – that our industry is struggling to keep up with.

It seems that our friends in the software industry also face big challenges, but they have been introducing many and different approaches, methodologies, technologies to do things different…and better. We will discuss the need and possibility of doing things different and potentially better, looking at certain concepts from the software development world and look into some possible concepts that could be adopted more broadly, such as: Open Source, Agile methodology and leveraging data and machine learning.

Siemens EDA customers will be delivering presentation and posters at DAC on their use of Siemens EDA technologies.

Customer presentations include:

• “Ensuring Completeness of Formal Verification with GapFree: Are we done yet?”
• “Efficient High-Sigma Verification of Standard Cell Libraries”

Customer poster sessions include:

• “Beyond Lint”
• “Formal Verification of Safety Mechanisms”

DAC Design Infrastructure Alley Presentation: Siemens EDA Cloud Offerings

3:30pm – 4:15pm PST | Monday, December 6^th

Watch Craig Johnson’s presentation at the Design on Cloud Theater to learn how Siemens EDA is leading the way in cloud-based EDA.

Siemens EDA on the Exhibit Floor

You can visit Siemens EDA experts on both exhibit floors of Moscone West. The main Siemens EDA booth (#2521) is on the second floor – stop by to grab a free espresso drink and tune in to our informative booth presentations. You can also find them in the booths for OneSpin, A Siemens Business (#1539), Siemens Cloud (#1246), and Siemens at RISC-V Pavilion, booth B7.

Also Read:

Machine Learning Applied to IP Validation, Running on AWS Graviton2

Siemens EDA Automotive Insights, for Analysts

Tessent Streaming Scan Network Brings Hierarchical Scan Test into the Modern Age