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Latest Virtuoso Studio & Specter Function Introduction Seminar

September 26, 2023 - September 27, 2023

As processes become finer and circuits become more complex, analog design becomes more and more difficult, requiring even greater efficiency and automation.

In this seminar, we will introduce solutions for solving design issues incorporated in the latest versions of the analog/mixed-signal IC design environment Virtuoso Studio and Specter, which were released at the end of June 2023.

We look forward to your participation.

[Date and time]

September 26 (Tue) 13:00-14:00
September 27 (Wed) 13:00-14:00


Cadence Design Systems Japan
Innotech Co., Ltd. IC Solution Division




Online (Zoom webinar)

*You can also participate from a web browser.

We recommend using Google Chrome, Firefox, or Chromium Edge.

[Participation method]

For those who have registered, information about Zoom access will be sent from cdsj_info@cadence.com by 17:00 on Monday, September 25th.
If you do not receive the email on September 25th, please contact us at the address below.

[Registration Deadline]

September 25 (Monday) 16:00


Japan Cadence CadenceTECHTALK Secretariat cdsj_info@cadence.com


September 26 (Tue) 13:00-14:00

Introducing Virtuoso Studio IC23.1 Front End New Features and Spectre23.1 Update

We will introduce new functions related to Front End (circuit design) of Virtuoso Studio IC23.1, especially technologies such as ADE Distribution, which improve user-friendliness and throughput for large-scale simulations.

We also introduce the latest updates to the tool from the concurrent release of Specter23.1, including improvements for larger circuits, such as GPU platform support and fast Monte Carlo, as well as approaches to high-yield analysis.

Yuko Yoneda, Principal Application Engineer, Field Engineering & Service Division, Cadence Design Systems, Japan

September 27 (Wednesday) 13:00-14:00

Introducing Virtuoso Studio IC23.1 Back End New Features and Process Migration Features

We will introduce the new functions related to Back End (layout design) of Virtuoso Studio IC23.1, especially those newly provided to improve productivity and the performance improvement of basic commands of Layout Editor.

In addition, I-Pegasus, a DRC verification tool in In-Design using Sign-Off rules, newly integrated in IC23.1, APR (Auto P&R), Schematic/layout with semi-automatic/automatic placement and routing functions. Introducing the migration function.

Tatsuya Sugawara Sr. Principal Application Engineer, Field Engineering & Service Division, Cadence Design Systems, Japan


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September 26, 2023
September 27, 2023
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