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Introduction to Mentor Graphics’ Analog Mixed Signal Implementation tool Tanner EVENT
Register For This Seminar
9:30 – 17:00 IST
This workshop will feature experts from Mentor Graphics’ Tanner Product Division in the field of Custom and Analog IC design, covering the various capabilities in the Tanner AMS tool. After an overview of the various tool capabilities, a lab session will be organized to over the tool features. This workshop will demonstrate how Mentor Graphics is meeting the needs of thousands of Analog Mixed Signal designers around the world with its Tanner suite of tools as a foundation for a Mentor based design flow. The Venue of the workshop will be Amirtha School of Engineering in Bangalore, Karnataka
Being the tool of choice at 1000’s of customer places, the Tanner product is tightly integrated with the rest of Mentor Eco System (AFS, Eldo, T-Spice, ModelSim/Questa on the simulators, Calibre on the Physical Verification and Nitro/Oasys on Digital Implementation). In addition, the purpose built capability in Tanner for Curved Layout for MEMS design along with partnership with 3D modeler SoftMEMS provides a unique offering for MEMS-IC CoDesign. Lastly, the emerging field of Integrated Photonics requires layout capabilities that models and automates wave guides design which Tanner uniquely offers.
The work shop will comprise of three parts – First will be a general overview of the Analog Mixed Signal Land scape and applicability of Tanner in this space. Second will be a demo in which we will cover the Analog Mixed Signal capabilities in the Tanner tool. Finally participants will be provided a cheat sheet using which they will be guided to design smaller circuits in Tanner, simulate using T-Spice & ModelSim, perform Layout design and use our Calibre tool to physically verify the designs.
What You Will Learn
- Applicability of Tanner in Analog Mixed Signal , MEMS and Photonics domains
- Demo of Tanner Analog Mixed Signal Tools
- Hands on Workshop/Training of designing simple Analog circuits, Perform Circuit simulations, Layout and physically verify the correctness of the layout in our Calibre physical verification tool
Who Should Attend
- Analog Design Engineer
- Analog Design Manager
- Students and Professors in the Analog domain
Murali Seshadri works as a Sr. Product Manager with the Tanner product division of Mentor Graphics and is based at their Bangalore office. Murali is currently responsible for Technical Marketing and evangelization of the Tanner solutions in Indian Market both for short term as well long term proliferation. He enjoys working with customers (primarily startups) to support their evolving needs. Murali has over 20+ years of experience in the Semiconductor industry and has previously worked for companies Synopsys, Cypress Semiconductor, Intel and Qualcomm in various roles ranging from CAD Engineer, Applications Engineer, Design Engineer, Design Manager and Product Engineer. He was part of the team that developed the worlds’ first 45 nm commercial chip at Intel. Murali received his Bachelors of Science Degree in Electronics & Communication from University of Madras and Masters’ degree in Electrical Engineering from University of Kentucky, Lexington in the USA
Baranidharan Vadivelu (Barani) brings in 15+ years of experience in the Analog design space. His’ areas of interest include Device characterization, schematic & layout, & Circuit Simulation. Barani currently works as an Application Engineer for the Tanner product of Mentor Graphics in Bangalore. Before joining Mentor Graphics, Barani worked at Entuple Technologies Pvt. Ltd in their EPiCS team and led an Applications Engineering team supporting sales efforts presenting EDA products, technical workshops, seminars, & key customer engagements. Prior to Entuple, Barani was a Branch/Tech Manager & Sr. AE, for Trident Techlabs, representing the IC & PCB Design tools – including Tanner, Calibre, Questa/ModelSim, Eldo, & many others. Barani holds a Diploma in Electronics from NTTF Electronics TC & a PG Diploma in VLSI from Sandeepani – School of VLSI Design, both in Bangalore, India