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CadenceCONNECT: A New Era of Analog/Mixed-Signal Design

November 17, 2020 @ 8:00 AM - 5:00 PM


Rapidly changing market needs, especially in 5G and automotive, have made IC design even more complex. The traditional approach of design partitioning is breaking down and it’s essential to analyze multiple interactions between separate design domains.

Cadence has applied machine learning to deliver significant innovations in our Virtuoso®, Quantus, and Spectre® tools. We’ve introduced new approaches for deep verification across analog and mixed-signal circuits, and provided new tooling for reliability, thermal performance, low power, and functional safety.

Please join us for an Analog/Mixed-Signal Design seminar. This event will describe methodologies based on our advanced technology that offer you greater productivity, better design robustness, and more ability to invent in this multifaceted world.

Date and Time

Time: 12:15 – 16:30 pm (Taipei Standard Time)

Agenda 議程

12:15-13:30 – 報到與午餐

13:30-14:00 -應對類比/射頻/混合訊號設計全新挑戰的解決方案

                      (Solutions for New Challenges in Analog/RF/Mixed-Signal Design)

                     -Scott Li, AE Director

14:00-14:30 – 如何簡單有效率去實現類比/射頻/混合訊號設計

                      (Explore Analog/RF/Mixed-Signal Design with Ease and Efficiency)

                     -Ring Chang, Sr. Principal Application Engineer

14:30-15:00 – 利用Spectre X來加速混合訊號驗證

                     (Speed up your Mixed-Signal Verification with Spectre X Simulator)

                    -Francis Chu, Sr Principal Application Engineer

15:00-15:20 茶歇 Breaktime

15:20-15:50 – 以先進方法加速Custom IC佈局

                      (Advanced Custom Layout Methodologies)

                     -Wei-Yuan Chen, Principal Application Engineer

15:50-16:20 – 更準、更快地實現IC簽核與驗證

                     (Accurate and Fast Silicon Signoff and Verification)

-Momo Chang, Sr. Principal Application Engineer

16:20 – 16:45 Q&A and Lucky Draw


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