WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 261
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 261
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)
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WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 261
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 261
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
)
Ansys, Inc.
Posted on by Paul McLellan

PowerArtist webinar

PowerArtist webinar
by Paul McLellan on 07-21-2011 at 3:21 pm
Categories: Ansys, Inc., EDA

The next Apache webinar is on PowerArtist, RTL Power Analysis on July 26th at 11am Pacific time. The webinar will be conducted by David “Woody” Norwood, Principal Applications Engineer at Apache Design Solutions. David has been supporting RTL Power products for the past 8 years. He has broad EDA industry experience with 25 years in a variety of Applications Engineering and Management roles focusing on power and logic verification technologies.

A complete RTL design-for-power platform providing fully-integrated advanced analysis and automatic reduction technologies, including sequential logic, combinatorial clock gating, memory, and data path for complex IP and SoC designs. By enabling analysis, reduction, and optimization early in the design cycle, PowerArtist helps designers meet power budget requirements and increase the power efficiency of their ICs.

To register for the webinar go here.

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