2014: Keep calm, and program gates

I was tempted to call this piece “if you’re not using an FPGA, you’re doing it wrong,” but that didn’t quite capture the whole picture. Social memes aside, the FPGA as we know it is undergoing a serious transformation into a full blown SoC, and 2014 is the year that will usher in one of the biggest changes in the history of embedded design.

The Xilinx Zynq is the first of these game changers. We all love the low cost Raspberry Pi and BeagleBone Black, but the SoCs on those boards are low end compared to what the Zynq found on the Avnet MicroZed and other boards like the Red Pitaya and the Parallela can do. With programmable gates in hand, designers can customize I/O and add features as needed.

Zynq (note to Luke Miller: Xilinx is quick to point out “it’s an SoC, not an FPGA”) is a scalable family, running from a low end with 28K logic cells to a high end with 444K cells and advanced high speed serial transceivers, all astride a dual ARM Cortex-A9 processing system. One of the big features of Zynq is that the programmable logic side can be coupled into the processing system using a cache coherent AXI interface, making hardware acceleration of algorithms much faster. Zynq also supports partial reconfiguration, where only some of the gates are reprogrammed while the rest of the logic remains in operation.

Behind but not outdone is Altera, who has been sorting out an advanced fab to get bigger and faster. The Cyclone V family was a good start but fell out of the race rather quickly. The real power is coming in 2014 in the form of the Arria 10 SoC. Packing a 1.5 GHz dual ARM Cortex-A9 and up to 660K logic gates implemented in TSMC 20nm, the Arria 10 really gets into the programmable SoC game. The allure of a fast multicore engine running Linux or an RTOS combined with fast transceivers and gates for DSP and other functions is irresistible.

There is more on the horizon. Xilinx has previewed their TSMC 20nm UltraScale architecture, which presumably will hit the programmable SoC roadmap in late 2014. Achronix, Altera, Microsemi (who has the Smart Fusion 2 and its ARM Cortex-M3 core at the low end), and Tabula have all announced foundry agreements with Intel. This not only means FinFET FPGAs with power and cost advantages, but also raises the possibility of a future Stellarton-redux with an Intel Quark SoC surrounded by some gates – ARM may not be the only core in this town, and if you think Intel hasn’t noticed this trend, think again.

What does this mean for embedded design? First, the walls between hardware and software designers are crumbling. IP blocks will become more and more a collaboration between software on a core and hardware in programmable gates. Second, designers are less willing to accept cookie-cutter processors with only the I/O vendors choose to provide in a chipset, and opting for workflow-customized programmable SoCs that can add value and differentiate products exactly as needed.

Third, and maybe most importantly, much as C/C++ became the ubiquitous embedded programming standard, RTL and SystemC will move into every design team – not just the folks designing the SoCs themselves. High level synthesis is going to right at the center of this battle. In fact, I think we’re going to see more tools made for side-by-side programming and debug of both the processing core and the programmable logic.

On top of that, I think the notion of “we’re a Xilinx house” or “we’re an Altera house” will break down, because speed-to-market will dictate IP be portable across devices and architectures, and new features are going to show up from many more places much more quickly. There will be increasingly less funding for cookie-cutter stuff especially at the high end (see Calxeda), and more demand for devices that can be picked up, customized, and interconnected quickly.

This all means vendor-independent design tools like the Aldec FPGA design family, with support for multiple FPGA and programmable SoC architectures, are very likely to take on a bigger role. The whole game is going to be generating, integrating, and reusing IP, on as many devices as possible, and proprietary tools and lock-in will be viewed less favorably.

The power of the programmable SoC is one big trend to watch for 2014 and beyond.

More articles by Don Dingee…

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