Most of the discussion around Xilinx UltraScale parts in FPGA-based prototyping modules has been on capacity, and that is certainly a key part of the story. Another use case is developing, one that may be even more important than simply packing a bigger design into a single part without partitioning. The real win with this technology… Read More
Tag: workload optimized
Xilinx in an ARM-fueled post-Altera world
When the news broke about the on, off, and on-again Intel-Altera merger a few weeks ago, I checked off another box on my Six Degrees of Kevin Bacon scorecard. That plus a $5 bill gets me a Happy Meal at McDonalds, but in a post-Altera world, it might be worth more.
On January 16, 2008, I’m sitting in a meeting with some Intel strategic marketing… Read More
Fantasy Tech-Ball and the Intel Rumor Wire
Reading Intel analysis lately has been a lot like reading fantasy baseball analysis. Intel should buy Altera. Intel should waive Atom. Intel should fab for Apple. All of those have a near-zero probability of happening IMHO, and yet pundits continue to pitch their version of alternate reality, dealing away product lines and strategies… Read More
2014: Keep calm, and program gates
I was tempted to call this piece “if you’re not using an FPGA, you’re doing it wrong,” but that didn’t quite capture the whole picture. Social memes aside, the FPGA as we know it is undergoing a serious transformation into a full blown SoC, and 2014 is the year that will usher in one of the biggest changes in the history of embedded design.… Read More